Integrated circuits - Verification.

Generating Hardware Assertion Checkers = For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring / by: (Language materials, printed)

Creating Assertion-Based IP by: (Language materials, printed)

Systemverilog for verification = a guide to learning the testbench language features / by: (Language materials, printed)

Test pattern generation using boolean proof engines by: (Language materials, printed)

Debugging at the electronic system level by: (Language materials, printed)

Counterfeit integrated circuits = detection and avoidance / by: (Electronic resources)

Computer-hardware evaluation of mathematical functions by: (Electronic resources)

Formal system verification = state-of the-art and future trends / by: (Electronic resources)

System Verilog assertions and functional coverage = guide to language, methodology and applications / by: (Electronic resources)

Authentication of embedded devices = technologies, protocols and emerging applications / by: (Electronic resources)

Integrated circuit authentication = hardware trojans and counterfeit detection / by: (Electronic resources)

Advanced techniques for assertion-based verification in hardware designs using data mining algorithms by: (Electronic resources)

Verification by error modeling = using testing techniques in hardware verification / by: (Electronic resources)

Assertion-based design by: (Electronic resources)

Comprehensive functional verification the complete industry cycle by: (Electronic resources)

Writing testbenches = functional verification of HDL models / by: (Electronic resources)

Advanced verification techniques = a SystemC based approach for successful tapeout / by: (Language materials, printed)

The e hardware verification language by: (Language materials, printed)

Verification by error modeling : = using testing techniques in hardware verification by: (Language materials, printed)

Professional verification = a guide to advanced functional verification / by: (Language materials, printed)

Functional verification coverage measurement and analysis by: (Language materials, printed)

Models in hardware testing = lecture notes of the forum in honor of Christian Landrault / by: (Language materials, printed)

Formal hardware verification = methods and systems in comparison / by: (Language materials, printed)

Logic synthesis and verification algorithms by: (Language materials, printed)

Writing testbenches = functional verification of HDL models / by: (Language materials, printed)

SystemVerilog for verification = a guide to learning the testbench language features / by: (Electronic resources)

Trace-based post-silicon validation for VLSI circuits by: (Electronic resources)

SystemVerilog assertions and functional coverage = guide to language, methodology and applications / by: (Electronic resources)