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Languages, design methods, and tools...

GroBe, Daniel.

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Languages, design methods, and tools for electronic system design = selected contributions from FDL 2017 /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Languages, design methods, and tools for electronic system design/ edited by Daniel GroBe, Sara Vinco, Hiren Patel.
其他題名:	selected contributions from FDL 2017 /
其他作者:	GroBe, Daniel.
出版者:	Cham :Springer International Publishing : : 2019.,
面頁冊數:	vii, 130 p. :ill., digital ;24 cm.
內容註:	1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces -- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach -- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers -- 4. Language and Hardware Acceleration Backend for Graph Processing -- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction -- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.
Contained By:	Springer eBooks
標題:	Electronic circuit design - Data processing -
電子資源:	https://doi.org/10.1007/978-3-030-02215-0
ISBN:	9783030022150

Languages, design methods, and tools for electronic system design = selected contributions from FDL 2017 /
Languages, design methods, and tools for electronic system designselected contributions from FDL 2017 /[electronic resource] :edited by Daniel GroBe, Sara Vinco, Hiren Patel. - Cham :Springer International Publishing :2019. - vii, 130 p. :ill., digital ;24 cm. - Lecture notes in electrical engineering,v.5301876-1100 ;. - Lecture notes in electrical engineering ;v.530..

1. Automatic Integration of HDL IPs in Simulinkusing FMI and S-Function Interfaces -- 2. Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach -- 3. Symbolic Simulation of Dataflow Synchronous Programs with Timers -- 4. Language and Hardware Acceleration Backend for Graph Processing -- 5. Fault Analysis in Analog Circuits through Language Manipulation and Abstraction -- 6. A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.

This book brings together a selection of the best papers from the twentiethedition of the Forum on specification and Design Languages Conference (FDL), which took place on September 18-20, 2017, in Verona, Italy. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems. Covers modeling and verification methodologies targeting digital and analog systems; Addresses firmware development and validation; Targets both functional and non-functional properties; Includes descriptions of methods for reliable system design.

ISBN: 9783030022150

Standard No.: 10.1007/978-3-030-02215-0doiSubjects--Topical Terms:

695823
Electronic circuit design
--Data processing

LC Class. No.: TK7867 / .L364 2019

Dewey Class. No.: 621.3815

Languages, design methods, and tools for electronic system design = selected contributions from FDL 2017 /
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