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Implementation of SR Flip-Flop Based...

Sagi, Sai Praneeth.

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Implementation of SR Flip-Flop Based PUF on FPGA for Hardware Security.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Implementation of SR Flip-Flop Based PUF on FPGA for Hardware Security./
作者:	Sagi, Sai Praneeth.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2020,
面頁冊數:	59 p.
附註:	Source: Masters Abstracts International, Volume: 82-04.
Contained By:	Masters Abstracts International82-04.
標題:	Electrical engineering. -
電子資源:	https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=28022535
ISBN:	9798664718287

Implementation of SR Flip-Flop Based PUF on FPGA for Hardware Security.
Sagi, Sai Praneeth.

Implementation of SR Flip-Flop Based PUF on FPGA for Hardware Security. - Ann Arbor : ProQuest Dissertations & Theses, 2020 - 59 p.

Source: Masters Abstracts International, Volume: 82-04.

Thesis (M.S.E.E.)--University of South Florida, 2020.

This item must not be sold to any third party vendors.

Physical Unclonable Functions (PUF) are used for authentication and key generation to obtain a unique signature and are widely used in hardware security applications. In this work, we propose Set-Reset Flip-flop (SRFF) based PUF for FPGAs. We exploit the race around condition of the SRFF to obtain a one-bit signature output which is a function of feedback path delays. In deep sub-micron technology node, delay variations on an FPGA device are significant due to manufacturing process variations. Thus, an SRFF output value is a function of its location on the FPGA device. We implement registers of various bit widths and extract signature in different locations on a device. We demonstrate that the signatures are spatially unique for sufficiently large register bit widths. We have experimented with fifteen (15) Spartan-6 FPGA devices (45 nm technology node) to study the uniqueness, uniformity, randomness, and robustness of the PUF as the Spartan-6 FPGA devices are very well known for the low power applications and good performance. We explored the Xilinx 14.7 ISE tool and used some of its in-built core tools like Chip-scope to synthesize higher bitstreams.

ISBN: 9798664718287Subjects--Topical Terms:

649834
Electrical engineering.
Subjects--Index Terms:

Physical Unclonable Functions

Implementation of SR Flip-Flop Based PUF on FPGA for Hardware Security.
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020 $a 9798664718287
035 $a (MiAaPQ)AAI28022535
035 $a AAI28022535
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100 1 $a Sagi, Sai Praneeth. $3 3559832
245 1 0 $a Implementation of SR Flip-Flop Based PUF on FPGA for Hardware Security.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2020
300 $a 59 p.
500 $a Source: Masters Abstracts International, Volume: 82-04.
500 $a Advisor: Moreno, Wilfrido;Katkoori, Srinivas.
502 $a Thesis (M.S.E.E.)--University of South Florida, 2020.
506 $a This item must not be sold to any third party vendors.
520 $a Physical Unclonable Functions (PUF) are used for authentication and key generation to obtain a unique signature and are widely used in hardware security applications. In this work, we propose Set-Reset Flip-flop (SRFF) based PUF for FPGAs. We exploit the race around condition of the SRFF to obtain a one-bit signature output which is a function of feedback path delays. In deep sub-micron technology node, delay variations on an FPGA device are significant due to manufacturing process variations. Thus, an SRFF output value is a function of its location on the FPGA device. We implement registers of various bit widths and extract signature in different locations on a device. We demonstrate that the signatures are spatially unique for sufficiently large register bit widths. We have experimented with fifteen (15) Spartan-6 FPGA devices (45 nm technology node) to study the uniqueness, uniformity, randomness, and robustness of the PUF as the Spartan-6 FPGA devices are very well known for the low power applications and good performance. We explored the Xilinx 14.7 ISE tool and used some of its in-built core tools like Chip-scope to synthesize higher bitstreams.
590 $a School code: 0206.
650 4 $a Electrical engineering. $3 649834
650 4 $a Computer peripherals. $3 659962
650 4 $a Computer security. $3 540555
653 $a Physical Unclonable Functions
653 $a Set-Reset Flip-flop
690 $a 0544
690 $a 0984
710 2 $a University of South Florida. $b Electrical Engineering. $3 1678952
773 0 $t Masters Abstracts International $g 82-04.
790 $a 0206
791 $a M.S.E.E.
792 $a 2020
793 $a English
856 4 0 $u https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=28022535