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Languages, design methods, and tools...

FDL (Conference) ((2016 :)

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Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Languages, design methods, and tools for electronic system design/ edited by Franco Fummi, Robert Wille.
其他題名:	selected contributions from FDL 2016 /
其他題名:	FDL 2016
其他作者:	Fummi, Franco.
團體作者:	FDL (Conference)
出版者:	Cham :Springer International Publishing : : 2018.,
面頁冊數:	vii, 116 p. :ill., digital ;24 cm.
內容註:	Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.
Contained By:	Springer eBooks
標題:	Formal methods (Computer science) - Congresses. -
電子資源:	http://dx.doi.org/10.1007/978-3-319-62920-9
ISBN:	9783319629209

Languages, design methods, and tools for electronic system design = selected contributions from FDL 2016 /
Languages, design methods, and tools for electronic system designselected contributions from FDL 2016 /[electronic resource] :FDL 2016edited by Franco Fummi, Robert Wille. - Cham :Springer International Publishing :2018. - vii, 116 p. :ill., digital ;24 cm. - Lecture notes in electrical engineering,v.4541876-1100 ;. - Lecture notes in electrical engineering ;v.454..

Chapter1. Knowing Your AMS System's Limits: System Acceptance Region Exploration by Using Automated Model Refinement and Accelerated Simulation -- Chapter2. Designing Reliable Cyber-Physical Systems -- Chapter3. On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study -- Chapter4. Selective Abstraction and Stochastic Methods for Scalable Power Modelling of Heterogeneous Systems -- Chapter5. Feature based State Space Coverage of Analog Circuits -- Chapter6. Error-free Near-threshold Adiabatic CMOS Logic in Presence of Process Variation.

ISBN: 9783319629209

Standard No.: 10.1007/978-3-319-62920-9doiSubjects--Topical Terms:

622707
Formal methods (Computer science)
--Congresses.

LC Class. No.: QA76.9.F67

Dewey Class. No.: 621.3815

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