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FPGA implementations of elliptic cur...

Huang, Jian.

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FPGA implementations of elliptic curve cryptography and Tate pairing over binary field.

Record Type:	Language materials, printed : Monograph/item
Title/Author:	FPGA implementations of elliptic curve cryptography and Tate pairing over binary field./
Author:	Huang, Jian.
Description:	70 p.
Notes:	Adviser: Hao Li.
Contained By:	Masters Abstracts International46-03.
Subject:	Computer Science. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1449422
ISBN:	9780549318996

FPGA implementations of elliptic curve cryptography and Tate pairing over binary field.
Huang, Jian.

FPGA implementations of elliptic curve cryptography and Tate pairing over binary field. - 70 p.

Adviser: Hao Li.

Thesis (M.S.)--University of North Texas, 2007.

Elliptic curve cryptography (ECC) is an alternative to traditional techniques for public key cryptography. It offers smaller key size without sacrificing security level. Tate pairing is a bilinear map used in identity based cryptography schemes. In a typical elliptic curve cryptosystem, elliptic curve point multiplication is the most computationally expensive component. Similarly, Tate pairing is also quite computationally expensive. Therefore, it is more attractive to implement the ECC and Tate pairing using hardware than using software. The bases of both ECC and Tate pairing are Galois field arithmetic units. In this thesis, I propose the FPGA implementations of the elliptic curve point multiplication in GF (2283) as well as Tate pairing computation on supersingular elliptic curve in GF (2283 ). I have designed and synthesized the elliptic curve point multiplication and Tate pairing module using Xilinx's FPGA, as well as synthesized all the Galois arithmetic units used in the designs. Experimental results demonstrate that the FPGA implementation can speedup the elliptic curve point multiplication by 31.6 times compared to software based implementation. The results also demonstrate that the FPGA implementation can speedup the Tate pairing computation by 152 times compared to software based implementation.

ISBN: 9780549318996Subjects--Topical Terms:

626642
Computer Science.

FPGA implementations of elliptic curve cryptography and Tate pairing over binary field.
LDR:02177nam 2200277 a 45 001 947862
005 20110524
008 110524s2007 ||||||||||||||||| ||eng d
020 $a 9780549318996
035 $a (UMI)AAI1449422
035 $a AAI1449422
040 $a UMI $c UMI
100 1 $a Huang, Jian. $3 1271330
245 1 0 $a FPGA implementations of elliptic curve cryptography and Tate pairing over binary field.
300 $a 70 p.
500 $a Adviser: Hao Li.
500 $a Source: Masters Abstracts International, Volume: 46-03, page: 1572.
502 $a Thesis (M.S.)--University of North Texas, 2007.
520 $a Elliptic curve cryptography (ECC) is an alternative to traditional techniques for public key cryptography. It offers smaller key size without sacrificing security level. Tate pairing is a bilinear map used in identity based cryptography schemes. In a typical elliptic curve cryptosystem, elliptic curve point multiplication is the most computationally expensive component. Similarly, Tate pairing is also quite computationally expensive. Therefore, it is more attractive to implement the ECC and Tate pairing using hardware than using software. The bases of both ECC and Tate pairing are Galois field arithmetic units. In this thesis, I propose the FPGA implementations of the elliptic curve point multiplication in GF (2283) as well as Tate pairing computation on supersingular elliptic curve in GF (2283 ). I have designed and synthesized the elliptic curve point multiplication and Tate pairing module using Xilinx's FPGA, as well as synthesized all the Galois arithmetic units used in the designs. Experimental results demonstrate that the FPGA implementation can speedup the elliptic curve point multiplication by 31.6 times compared to software based implementation. The results also demonstrate that the FPGA implementation can speedup the Tate pairing computation by 152 times compared to software based implementation.
590 $a School code: 0158.
650 4 $a Computer Science. $3 626642
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0544
690 $a 0984
710 2 $a University of North Texas. $3 1017396
773 0 $t Masters Abstracts International $g 46-03.
790 $a 0158
790 1 0 $a Li, Hao, $e advisor
791 $a M.S.
792 $a 2007
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=1449422