東華大學圖書館 |

語系: 繁體中文

說明(常見問題)

回圖書館首頁

手機版館藏查詢

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

Strategies for enhancing DC gain and...

Yan, Jie.

FindBook

Google Book

Amazon

博客來

Strategies for enhancing DC gain and settling performance of amplifiers.

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Strategies for enhancing DC gain and settling performance of amplifiers./
作者:	Yan, Jie.
面頁冊數:	103 p.
附註:	Major Professor: Randall L. Geiger.
Contained By:	Dissertation Abstracts International63-08B.
標題:	Engineering, Electronics and Electrical. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3061875
ISBN:	0493779213

Strategies for enhancing DC gain and settling performance of amplifiers.
Yan, Jie.

Strategies for enhancing DC gain and settling performance of amplifiers. - 103 p.

Major Professor: Randall L. Geiger.

Thesis (Ph.D.)--Iowa State University, 2002.

The operational amplifier (op amp) is one of the most widely used and important building blocks in analog circuit design. High gain and high speed are two important properties of op amps because they determine the settling behavior of the op amps. As supply voltages decrease, the realization of high gain amplifiers with large Gain-Bandwidth-Products (GBW) has become challenging. The major focus in this dissertation is on the negative output impedance gain enhancement technique. The negative impedance gain enhancement technique offers potential for achieving very high gain and energy-efficient fast settling and is low-voltage compatible. Misconceptions that have limited the practical adoption of this gain enhancement technique are discussed. A new negative conductance gain enhancement technique was proposed. The proposed circuit generates a negative conductance with matching requirements for achieving very high DC gain that are less stringent than those for existing -g<sub> m</sub> gain enhancement schemes. The proposed circuit has potential for precise digital control of a very large DC gain. A prototype fully differential CMOS operational amplifier was designed and fabricated based on the proposed gain enhancement technique. Experimental results which showed a DC gain of 85dB and an output swing of 876mVp-p validated the fundamental performance characteristics of this technique. In a separate section, a new amplifier architecture with bandpass feedforward compensation is presented. It is shown that a bandpass feedforward path can be used to substantially extend the unity-gain-frequency of an operational amplifier. Simulation results predict significant improvements in rise time and settling performance and show that the bandpass compensation scheme is reasonably robust. In the final section, a new technique for asynchronous data recovery based upon using a delay line in the incoming data path is introduced. The proposed data recovery system is well suited for tight tolerance channels and coding systems supporting standards that limit the maximum number of consecutive 0's and 1's in a data stream. This system does not require clock recovery, suffers no loss of data during acquisition, has a reduced sensitivity to jitter in the incoming data and does not exhibit jitter enhancement associated with VCO tracking in a PLL.

ISBN: 0493779213Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

Strategies for enhancing DC gain and settling performance of amplifiers.
LDR:03223nam 2200265 a 45 001 936084
005 20110510
008 110510s2002 eng d
020 $a 0493779213
035 $a (UnM)AAI3061875
035 $a AAI3061875
040 $a UnM $c UnM
100 1 $a Yan, Jie. $3 1259780
245 1 0 $a Strategies for enhancing DC gain and settling performance of amplifiers.
300 $a 103 p.
500 $a Major Professor: Randall L. Geiger.
500 $a Source: Dissertation Abstracts International, Volume: 63-08, Section: B, page: 3856.
502 $a Thesis (Ph.D.)--Iowa State University, 2002.
520 $a The operational amplifier (op amp) is one of the most widely used and important building blocks in analog circuit design. High gain and high speed are two important properties of op amps because they determine the settling behavior of the op amps. As supply voltages decrease, the realization of high gain amplifiers with large Gain-Bandwidth-Products (GBW) has become challenging. The major focus in this dissertation is on the negative output impedance gain enhancement technique. The negative impedance gain enhancement technique offers potential for achieving very high gain and energy-efficient fast settling and is low-voltage compatible. Misconceptions that have limited the practical adoption of this gain enhancement technique are discussed. A new negative conductance gain enhancement technique was proposed. The proposed circuit generates a negative conductance with matching requirements for achieving very high DC gain that are less stringent than those for existing -g<sub> m</sub> gain enhancement schemes. The proposed circuit has potential for precise digital control of a very large DC gain. A prototype fully differential CMOS operational amplifier was designed and fabricated based on the proposed gain enhancement technique. Experimental results which showed a DC gain of 85dB and an output swing of 876mVp-p validated the fundamental performance characteristics of this technique. In a separate section, a new amplifier architecture with bandpass feedforward compensation is presented. It is shown that a bandpass feedforward path can be used to substantially extend the unity-gain-frequency of an operational amplifier. Simulation results predict significant improvements in rise time and settling performance and show that the bandpass compensation scheme is reasonably robust. In the final section, a new technique for asynchronous data recovery based upon using a delay line in the incoming data path is introduced. The proposed data recovery system is well suited for tight tolerance channels and coding systems supporting standards that limit the maximum number of consecutive 0's and 1's in a data stream. This system does not require clock recovery, suffers no loss of data during acquisition, has a reduced sensitivity to jitter in the incoming data and does not exhibit jitter enhancement associated with VCO tracking in a PLL.
590 $a School code: 0097.
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0544
710 2 0 $a Iowa State University. $3 1017855
773 0 $t Dissertation Abstracts International $g 63-08B.
790 $a 0097
790 1 0 $a Geiger, Randall L., $e advisor
791 $a Ph.D.
792 $a 2002
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3061875