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High efficiency delta-sigma modulati...

Oregon State University.

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High efficiency delta-sigma modulation data converters.

Record Type:	Electronic resources : Monograph/item
Title/Author:	High efficiency delta-sigma modulation data converters./
Author:	Lee, Kyehyung.
Description:	151 p.
Notes:	Adviser: Gabor C. Temes.
Contained By:	Dissertation Abstracts International69-04B.
Subject:	Engineering, Electronics and Electrical. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3308576
ISBN:	9780549555292

High efficiency delta-sigma modulation data converters.
Lee, Kyehyung.

High efficiency delta-sigma modulation data converters. - 151 p.

Adviser: Gabor C. Temes.

Thesis (Ph.D.)--Oregon State University, 2008.

Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common everyday life. Wide signal bandwidth, high linearity and dynamic range, and low power dissipation are required of embedded data converters that are the performance-limiting key building blocks of those systems. Thus, power-efficient and highly-linear data conversion over wide range of signal bands is essential to get the full benefits from device scaling. This continued trend keeps innovation in the design of data converter continuing.

ISBN: 9780549555292Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

High efficiency delta-sigma modulation data converters.
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020 $a 9780549555292
035 $a (UMI)AAI3308576
035 $a AAI3308576
040 $a UMI $c UMI
100 1 $a Lee, Kyehyung. $3 1058463
245 1 0 $a High efficiency delta-sigma modulation data converters.
300 $a 151 p.
500 $a Adviser: Gabor C. Temes.
500 $a Source: Dissertation Abstracts International, Volume: 69-04, Section: B, page: 2523.
502 $a Thesis (Ph.D.)--Oregon State University, 2008.
520 $a Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common everyday life. Wide signal bandwidth, high linearity and dynamic range, and low power dissipation are required of embedded data converters that are the performance-limiting key building blocks of those systems. Thus, power-efficient and highly-linear data conversion over wide range of signal bands is essential to get the full benefits from device scaling. This continued trend keeps innovation in the design of data converter continuing.
520 $a Traditionally, delta-sigma modulation data converters proved to be very effective in applications where high resolution was necessary in a relatively narrow signal band. There have been active research efforts across academia and industry on the extension of achievable signal bandwidth without compromising the performance of these data converters. In this dissertation, architectural innovations, combined with effective design techniques for delta-sigma modulation data converters, are presented to overcome the associated limitations. The effectiveness of the proposed approaches is demonstrated by test results for the following state-of-the-art prototype designs: (1) a 0.8 V, 2.6 mW, 88 dB dual-channel audio delta-sigma modulation D/A converter with headphone driver; (2) an 88 dB ring-coupled delta-sigma ADC with 1.9 MHz bandwidth and -102.4 dB THD; (3) a multi-cell noise-coupled delta-sigma ADC with 1.9 MHz bandwidth, 88 dB DR, and -98 dB THD; (4) an 8.1 mW, 82 dB self-coupled delta-sigma ADC with 1.9 MHz bandwidth and -97 dB THD; (5) a noise-coupled time-interleaved delta-sigma ADC with 4.2 MHz bandwidth, -98 dB THD, and 79 dB SNDR; (6) a noise-coupled time-interleaved delta-sigma ADC with 2.5 MHz bandwidth, -104 dB THD, and 81 dB SNDR. As an extension of this research, two novel architectures for efficient double-sampling delta-sigma ADCs and improved low-distortion delta-sigma ADC are proposed, and validated by extensive simulations.
590 $a School code: 0172.
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0544
710 2 $a Oregon State University. $3 625720
773 0 $t Dissertation Abstracts International $g 69-04B.
790 $a 0172
790 1 0 $a Temes, Gabor C., $e advisor
791 $a Ph.D.
792 $a 2008
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3308576