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Integrated circuit and system design...

Monteiro, Jose.

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Integrated circuit and system design = power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers/

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Integrated circuit and system design/ Lars Svensson, Jose Monteiro (eds.)
其他題名:	power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers/
其他作者:	Monteiro, Jose.
團體作者:	PATMOS 2008
出版者:	Berlin, Heidelberg :Springer Berlin Heidelberg, : 2009.,
面頁冊數:	xiii, 462 p. :ill., digital ;24 cm.
叢書名:	Lecture notes in computer science,
Contained By:	Springer eBooks
標題:	Integrated circuits - Congresses. - Very large scale integration -
電子資源:	http://dx.doi.org/10.1007/978-3-540-95948-9
ISBN:	9783540959472 (paper)

Integrated circuit and system design = power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers/
Integrated circuit and system designpower and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers/[electronic resource] :Lars Svensson, Jose Monteiro (eds.) - Berlin, Heidelberg :Springer Berlin Heidelberg,2009. - xiii, 462 p. :ill., digital ;24 cm. - Lecture notes in computer science,53490302-9743 ;.

ISBN: 9783540959472 (paper)Subjects--Topical Terms:

893429
Integrated circuits
--Very large scale integration--Congresses.

Dewey Class. No.: 621.395

Integrated circuit and system design = power and timing modeling, optimization and simulation : 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, revised selected papers/
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650 2 4 $a Processor Architectures. $3 892680
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