微處理機位址匯流排之低功率架構設計 = = Architectural...
吳長隆

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  • 微處理機位址匯流排之低功率架構設計 = = Architectural support for low-power microprocessor address buses /
  • Record Type: Language materials, printed : Monograph/item
    Title/Author: 微處理機位址匯流排之低功率架構設計 = / 吳長隆撰
    Reminder of title: Architectural support for low-power microprocessor address buses /
    remainder title: Architectural support for low-power microprocessor address buses
    Author: 吳長隆
    other author: 紀新洲
    Published: 民88[1999],
    Description: v,83面 : 圖,表格 ; 30公分
    Notes: 指導教授: 紀新洲
    Subject: 電腦學 -
Location:  Year:  Volume Number: 
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  • 1 records • Pages 1 •
 
GE0015121 五樓論文區 (5F Theses & Dissertations) 03.不外借_N 本校碩士論文 T 312.9 2677 一般使用(Normal) On shelf 0
  • 1 records • Pages 1 •
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