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Layout Optimization Algorithm for Ga...
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Dotson, Thomas Owen,
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Layout Optimization Algorithm for Gallium-Nitride-Based Buck Converter Commutation Loop on Printed Circuit Board /
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Layout Optimization Algorithm for Gallium-Nitride-Based Buck Converter Commutation Loop on Printed Circuit Board // Thomas Owen Dotson.
作者:
Dotson, Thomas Owen,
面頁冊數:
1 electronic resource (104 pages)
附註:
Source: Dissertations Abstracts International, Volume: 85-01, Section: A.
Contained By:
Dissertations Abstracts International85-01A.
標題:
Design optimization. -
電子資源:
https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=30516408
ISBN:
9798379866594
Layout Optimization Algorithm for Gallium-Nitride-Based Buck Converter Commutation Loop on Printed Circuit Board /
Dotson, Thomas Owen,
Layout Optimization Algorithm for Gallium-Nitride-Based Buck Converter Commutation Loop on Printed Circuit Board /
Thomas Owen Dotson. - 1 electronic resource (104 pages)
Source: Dissertations Abstracts International, Volume: 85-01, Section: A.
An optimization algorithm for the layout of a power electronics buck converter using GaN FETs for a multi-layer printed circuit board is presented and validated. The benefit of this algorithm is that it solves the layout optimization problem for three-dimensional interconnect structures and produces variable geometry that hadn't been demonstrated in the literature. The subroutines of the algorithm are discussed at length including component placement and routing of connections.
English
ISBN: 9798379866594Subjects--Topical Terms:
3681984
Design optimization.
Layout Optimization Algorithm for Gallium-Nitride-Based Buck Converter Commutation Loop on Printed Circuit Board /
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An optimization algorithm for the layout of a power electronics buck converter using GaN FETs for a multi-layer printed circuit board is presented and validated. The benefit of this algorithm is that it solves the layout optimization problem for three-dimensional interconnect structures and produces variable geometry that hadn't been demonstrated in the literature. The subroutines of the algorithm are discussed at length including component placement and routing of connections.
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