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Bulk-driven circuit techniques for CMOS FDSOI processes = from circuit concept to implementations /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Bulk-driven circuit techniques for CMOS FDSOI processes/ edited by Friedel Gerfers.
其他題名:	from circuit concept to implementations /
其他作者:	Gerfers, F.
出版者:	Cham :Springer Nature Switzerland : : 2025.,
面頁冊數:	xxxv, 237 p. :ill. (chiefly col.), digital ;24 cm.
內容註:	Chapter 1. Common-Source Amplifier Feedback using Back-Gate Transconductance -- Chapter 2. Transconductance Amplifier Linearization using Active Back-Gate Input Signal Injection -- Chapter 3. A Gain-enhanced Inverter-based OTA Employing Active Body-Bias Feedback -- Chapter 4. Ultra Low-Power Voltage-Mode VCSEL-Driver with Back-Gate Bias Tuning -- Chapter 5. Maximizing the Figures of Merit, Temperature Range, and Optimizing the Algorithmic Design Methodologies Based on Constant Current Density Bias for FDSOI Analog-Mixed-Signal, Digital, mm-Wave, and Fibreoptic Circuits from the Back-Gate Voltage -- Chapter 6. A Back-Gate Linearization Technique for Current-Steering DACs -- Chapter 7. Highly-Linear T&H-Amplifiers Utilizing Bandwidth Boosting for Time-Interleaved ADCs -- Chapter 8. High-Speed Flash ADC using Bulk-Driven Flash Reference Generation Technique -- Chapter 9. RF Switches in CMOS FDSOI Process - from Circuit Concepts to Implementation -- Chapter 10. Variable Gain-Control with Bulk Biasing in mmW Amplifier.
Contained By:	Springer Nature eBook
標題:	Electronic circuit design. -
電子資源:	https://doi.org/10.1007/978-3-031-85114-8
ISBN:	9783031851148

Bulk-driven circuit techniques for CMOS FDSOI processes = from circuit concept to implementations /
Bulk-driven circuit techniques for CMOS FDSOI processesfrom circuit concept to implementations /[electronic resource] :edited by Friedel Gerfers. - Cham :Springer Nature Switzerland :2025. - xxxv, 237 p. :ill. (chiefly col.), digital ;24 cm.

Chapter 1. Common-Source Amplifier Feedback using Back-Gate Transconductance -- Chapter 2. Transconductance Amplifier Linearization using Active Back-Gate Input Signal Injection -- Chapter 3. A Gain-enhanced Inverter-based OTA Employing Active Body-Bias Feedback -- Chapter 4. Ultra Low-Power Voltage-Mode VCSEL-Driver with Back-Gate Bias Tuning -- Chapter 5. Maximizing the Figures of Merit, Temperature Range, and Optimizing the Algorithmic Design Methodologies Based on Constant Current Density Bias for FDSOI Analog-Mixed-Signal, Digital, mm-Wave, and Fibreoptic Circuits from the Back-Gate Voltage -- Chapter 6. A Back-Gate Linearization Technique for Current-Steering DACs -- Chapter 7. Highly-Linear T&H-Amplifiers Utilizing Bandwidth Boosting for Time-Interleaved ADCs -- Chapter 8. High-Speed Flash ADC using Bulk-Driven Flash Reference Generation Technique -- Chapter 9. RF Switches in CMOS FDSOI Process - from Circuit Concepts to Implementation -- Chapter 10. Variable Gain-Control with Bulk Biasing in mmW Amplifier.

In the contemporary technology landscape dominated by digital-centric systems and applications, the significance of analog front-end signal processing remains indispensable. The precision and performance of critical analog, mixed-signal or mm-wave components such as low-noise amplifiers, equalizers, and data converters are fundamentally determined by technological parameters, such as transconductance, DC gain, device matching, linearity, and timing accuracy, among others. Enhancing these parameters through intrinsic design improvements presents a significant challenge and becomes infeasible beyond certain limits with state-of-the-art circuit design techniques. As the performance of CMOS transistors is fundamentally constrained, foreground or background calibration schemes are commonly employed to mitigate the limitations of MOS devices. However, these constraints can be effectively addressed through the implementation of active and passive bulk-driven circuits enabled by silicon-on-insulator (SOI) CMOS technologies. Fully-Depleted Silicon-on-Insulator (FD-SOI) CMOS technologies offer superior transistor characteristics compared to standard bulk CMOS technology, providing enhanced electrical performance, improved power efficiency, and better scalability. This book offers a comprehensive analysis of FD-SOI CMOS technology, presenting key innovations in design methodologies and circuit implementations adopting bulk-biasing techniques across analog, digital, mixed-signal, and mmWave circuits and systems. It addresses critical transistor limitations, including finite transistor gain, offset, mismatch, noise and linearity, among others. The authors provide detailed technical insights, mathematical modelling, design approaches and circuit realizations covering circuit advances using both static and dynamic transistor body-biasing techniques. Emphasis is placed on overcoming state-of-the-art circuit limitations such as finite DC gain, bandwidth, matching/accuracy and power efficiency. These performance metrics are rigorously investigated through mathematical modelling, validated through simulation and experimentally demonstrated using both dynamic and static body-biasing architectures. An essential guide for innovations using dynamic and static transistor body-biasing techniques; Describes FD-SOI CMOS bulk physics incl. the impact on technology parameters; Presents advanced active and passive body-biasing design methods.

ISBN: 9783031851148

Standard No.: 10.1007/978-3-031-85114-8doiSubjects--Topical Terms:

649346
Electronic circuit design.

LC Class. No.: TK7867

Dewey Class. No.: 621.3815

Bulk-driven circuit techniques for CMOS FDSOI processes = from circuit concept to implementations /
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520 $a In the contemporary technology landscape dominated by digital-centric systems and applications, the significance of analog front-end signal processing remains indispensable. The precision and performance of critical analog, mixed-signal or mm-wave components such as low-noise amplifiers, equalizers, and data converters are fundamentally determined by technological parameters, such as transconductance, DC gain, device matching, linearity, and timing accuracy, among others. Enhancing these parameters through intrinsic design improvements presents a significant challenge and becomes infeasible beyond certain limits with state-of-the-art circuit design techniques. As the performance of CMOS transistors is fundamentally constrained, foreground or background calibration schemes are commonly employed to mitigate the limitations of MOS devices. However, these constraints can be effectively addressed through the implementation of active and passive bulk-driven circuits enabled by silicon-on-insulator (SOI) CMOS technologies. Fully-Depleted Silicon-on-Insulator (FD-SOI) CMOS technologies offer superior transistor characteristics compared to standard bulk CMOS technology, providing enhanced electrical performance, improved power efficiency, and better scalability. This book offers a comprehensive analysis of FD-SOI CMOS technology, presenting key innovations in design methodologies and circuit implementations adopting bulk-biasing techniques across analog, digital, mixed-signal, and mmWave circuits and systems. It addresses critical transistor limitations, including finite transistor gain, offset, mismatch, noise and linearity, among others. The authors provide detailed technical insights, mathematical modelling, design approaches and circuit realizations covering circuit advances using both static and dynamic transistor body-biasing techniques. Emphasis is placed on overcoming state-of-the-art circuit limitations such as finite DC gain, bandwidth, matching/accuracy and power efficiency. These performance metrics are rigorously investigated through mathematical modelling, validated through simulation and experimentally demonstrated using both dynamic and static body-biasing architectures. An essential guide for innovations using dynamic and static transistor body-biasing techniques; Describes FD-SOI CMOS bulk physics incl. the impact on technology parameters; Presents advanced active and passive body-biasing design methods.
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650 0 $a Metal oxide semiconductors, Complementary. $3 649504
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