東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back

Switch To: Labeled | MARC Mode | ISBD

Guessing random additive noise decod...

Abbas, Syed Mohsin.

Linked to FindBook

Google Book

Amazon

博客來

Guessing random additive noise decoding = a hardware perspective /

Record Type:	Electronic resources : Monograph/item
Title/Author:	Guessing random additive noise decoding/ by Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross.
Reminder of title:	a hardware perspective /
Author:	Abbas, Syed Mohsin.
other author:	Jalaleddine, Marwan.
Published:	Cham :Springer Nature Switzerland : : 2023.,
Description:	xiv, 151 p. :ill. (some col.), digital ;24 cm.
[NT 15003449]:	Guessing Random Additive Noise Decoding (GRAND) -- Hardware Architecture for GRAND with ABandonment (GRANDAB) -- Hardware Architecture for Ordered Reliability Bits GRAND (ORBGRAND) -- Hardware Architecture for List GRAND (LGRAND) -- Hardware Architecture for GRAND Markov Order (GRAND-MO) -- Hardware Architecture for Fading-GRAND -- A survey of recent GRAND variants.
Contained By:	Springer Nature eBook
Subject:	Decoders (Electronics) -
Online resource:	https://doi.org/10.1007/978-3-031-31663-0
ISBN:	9783031316630

Guessing random additive noise decoding = a hardware perspective /
Abbas, Syed Mohsin.

Guessing random additive noise decodinga hardware perspective /[electronic resource] :by Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross. - Cham :Springer Nature Switzerland :2023. - xiv, 151 p. :ill. (some col.), digital ;24 cm.

Guessing Random Additive Noise Decoding (GRAND) -- Hardware Architecture for GRAND with ABandonment (GRANDAB) -- Hardware Architecture for Ordered Reliability Bits GRAND (ORBGRAND) -- Hardware Architecture for List GRAND (LGRAND) -- Hardware Architecture for GRAND Markov Order (GRAND-MO) -- Hardware Architecture for Fading-GRAND -- A survey of recent GRAND variants.

This book gives a detailed overview of a universal Maximum Likelihood (ML) decoding technique, known as Guessing Random Additive Noise Decoding (GRAND), has been introduced for short-length and high-rate linear block codes. The interest in short channel codes and the corresponding ML decoding algorithms has recently been reignited in both industry and academia due to emergence of applications with strict reliability and ultra-low latency requirements. A few of these applications include Machine-to-Machine (M2M) communication, augmented and virtual Reality, Intelligent Transportation Systems (ITS), the Internet of Things (IoTs), and Ultra-Reliable and Low Latency Communications (URLLC), which is an important use case for the 5G-NR standard. GRAND features both soft-input and hard-input variants. Moreover, there are traditional GRAND variants that can be used with any communication channel, and specialized GRAND variants that are developed for a specific communication channel. This book presents a detailed overview of these GRAND variants and their hardware architectures. The book is structured into four parts. Part 1 introduces linear block codes and the GRAND algorithm. Part 2 discusses the hardware architecture for traditional GRAND variants that can be applied to any underlying communication channel. Part 3 describes the hardware architectures for specialized GRAND variants developed for specific communication channels. Lastly, Part 4 provides an overview of recently proposed GRAND variants and their unique applications. This book is ideal for researchers or engineers looking to implement high-throughput and energy-efficient hardware for GRAND, as well as seasoned academics and graduate students interested in the topic of VLSI hardware architectures. Additionally, it can serve as reading material in graduate courses covering modern error correcting codes and Maximum Likelihood decoding for short codes.

ISBN: 9783031316630

Standard No.: 10.1007/978-3-031-31663-0doiSubjects--Topical Terms:

2131098
Decoders (Electronics)

LC Class. No.: TK7872.D37

Dewey Class. No.: 621.3822

Guessing random additive noise decoding = a hardware perspective /
LDR:03392nmm a2200349 a 4500 001 2333630
003 DE-He213
005 20230817125338.0
006 m d
007 cr nn 008maaau
008 240402s2023 sz s 0 eng d
020 $a 9783031316630 $q (electronic bk.)
020 $a 9783031316623 $q (paper)
024 7 $a 10.1007/978-3-031-31663-0 $2 doi
035 $a 978-3-031-31663-0
040 $a GP $c GP
041 0 $a eng
050 4 $a TK7872.D37
072 7 $a GPJ $2 bicssc
072 7 $a GPF $2 bicssc
072 7 $a COM031000 $2 bisacsh
072 7 $a GPJ $2 thema
072 7 $a GPF $2 thema
082 0 4 $a 621.3822 $2 23
090 $a TK7872.D37 $b A122 2023
100 1 $a Abbas, Syed Mohsin. $3 3664524
245 1 0 $a Guessing random additive noise decoding $h [electronic resource] : $b a hardware perspective / $c by Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross.
260 $a Cham : $b Springer Nature Switzerland : $b Imprint: Springer, $c 2023.
300 $a xiv, 151 p. : $b ill. (some col.), digital ; $c 24 cm.
505 0 $a Guessing Random Additive Noise Decoding (GRAND) -- Hardware Architecture for GRAND with ABandonment (GRANDAB) -- Hardware Architecture for Ordered Reliability Bits GRAND (ORBGRAND) -- Hardware Architecture for List GRAND (LGRAND) -- Hardware Architecture for GRAND Markov Order (GRAND-MO) -- Hardware Architecture for Fading-GRAND -- A survey of recent GRAND variants.
520 $a This book gives a detailed overview of a universal Maximum Likelihood (ML) decoding technique, known as Guessing Random Additive Noise Decoding (GRAND), has been introduced for short-length and high-rate linear block codes. The interest in short channel codes and the corresponding ML decoding algorithms has recently been reignited in both industry and academia due to emergence of applications with strict reliability and ultra-low latency requirements. A few of these applications include Machine-to-Machine (M2M) communication, augmented and virtual Reality, Intelligent Transportation Systems (ITS), the Internet of Things (IoTs), and Ultra-Reliable and Low Latency Communications (URLLC), which is an important use case for the 5G-NR standard. GRAND features both soft-input and hard-input variants. Moreover, there are traditional GRAND variants that can be used with any communication channel, and specialized GRAND variants that are developed for a specific communication channel. This book presents a detailed overview of these GRAND variants and their hardware architectures. The book is structured into four parts. Part 1 introduces linear block codes and the GRAND algorithm. Part 2 discusses the hardware architecture for traditional GRAND variants that can be applied to any underlying communication channel. Part 3 describes the hardware architectures for specialized GRAND variants developed for specific communication channels. Lastly, Part 4 provides an overview of recently proposed GRAND variants and their unique applications. This book is ideal for researchers or engineers looking to implement high-throughput and energy-efficient hardware for GRAND, as well as seasoned academics and graduate students interested in the topic of VLSI hardware architectures. Additionally, it can serve as reading material in graduate courses covering modern error correcting codes and Maximum Likelihood decoding for short codes.
650 0 $a Decoders (Electronics) $3 2131098
650 1 4 $a Coding and Information Theory. $3 891252
650 2 4 $a Communications Engineering, Networks. $3 891094
650 2 4 $a Logic Design. $3 892735
650 2 4 $a Arithmetic and Logic Structures. $3 893182
700 1 $a Jalaleddine, Marwan. $3 3664525
700 1 $a Gross, Warren J. $3 3251588
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer Nature eBook
856 4 0 $u https://doi.org/10.1007/978-3-031-31663-0
950 $a Computer Science (SpringerNature-11645)