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Architectures and Tools for Efficien...

Chin, Stephen Alexander.

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Architectures and Tools for Efficient Reconfigurable Computing.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Architectures and Tools for Efficient Reconfigurable Computing./
Author:	Chin, Stephen Alexander.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2018,
Description:	124 p.
Notes:	Source: Dissertations Abstracts International, Volume: 80-06, Section: B.
Contained By:	Dissertations Abstracts International80-06B.
Subject:	Computer Engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10937557
ISBN:	9780438681392

Architectures and Tools for Efficient Reconfigurable Computing.
Chin, Stephen Alexander.

Architectures and Tools for Efficient Reconfigurable Computing. - Ann Arbor : ProQuest Dissertations & Theses, 2018 - 124 p.

Source: Dissertations Abstracts International, Volume: 80-06, Section: B.

Thesis (Ph.D.)--University of Toronto (Canada), 2018.

This item must not be sold to any third party vendors.

Recent decades have seen large growth in the silicon industry with transistor scaling and transistor count approximately doubling every two years. With the continued growth of transistors-per-chip and increasing power density, dark silicon challenges have risen. Reconfigurable computing poses a possible solution to some of the challenges through improving performance and energy efficiency by tailoring the hardware to the application. Field-Programmable Gate Arrays (FPGAs) are a platform for realizing reconfigurable computing and have had traction for over a decade. Their recent introduction into mainstream data-centres bodes well for the field. Another type of reconfigurable architecture, Coarse Grained Reconfigurable Arrays (CGRAs), poses one other platform for computing. Being more specialized than FPGAs, CGRAs' main selling point is increased efficiency versus FPGAs, at the cost of platform flexibility. This dissertation looks at efficient computing first from the perspective of FPGAs, developing new architectures and new CAD tools, making for a more efficient FPGA. The proposed FPGA architecture consists of a hybrid multiplexer / look-up-table logic block that has reduced area with respect to traditional architectures. Then, with the prospect that CGRA architectures hold, we develop an open-source framework, CGRA-ME, for the modelling and exploration of CGRAs. This unifying software framework incorporates, architecture description through a custom language, architecture modelling, application mapping, and RTL generation, and allows further development of CGRA architectures and related CAD tools throughout the research community. Within the CGRA-ME framework, a new architecture-agnostic application mapper formulated in an integer linear program was also developed for generic CGRAs. Through this dissertation, we have made headway towards more efficient reconfigurable architectures through architecture design and related CAD and are optimistic that these contributions will have positive impact on further research and industrial application of reconfigurable architectures.

ISBN: 9780438681392Subjects--Topical Terms:

1567821
Computer Engineering.
Subjects--Index Terms:

Coarse Grained Reconfigurable Arrays

Architectures and Tools for Efficient Reconfigurable Computing.
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500 $a Source: Dissertations Abstracts International, Volume: 80-06, Section: B.
500 $a Publisher info.: Dissertation/Thesis.
500 $a Advisor: Anderson, Jason H.
502 $a Thesis (Ph.D.)--University of Toronto (Canada), 2018.
506 $a This item must not be sold to any third party vendors.
520 $a Recent decades have seen large growth in the silicon industry with transistor scaling and transistor count approximately doubling every two years. With the continued growth of transistors-per-chip and increasing power density, dark silicon challenges have risen. Reconfigurable computing poses a possible solution to some of the challenges through improving performance and energy efficiency by tailoring the hardware to the application. Field-Programmable Gate Arrays (FPGAs) are a platform for realizing reconfigurable computing and have had traction for over a decade. Their recent introduction into mainstream data-centres bodes well for the field. Another type of reconfigurable architecture, Coarse Grained Reconfigurable Arrays (CGRAs), poses one other platform for computing. Being more specialized than FPGAs, CGRAs' main selling point is increased efficiency versus FPGAs, at the cost of platform flexibility. This dissertation looks at efficient computing first from the perspective of FPGAs, developing new architectures and new CAD tools, making for a more efficient FPGA. The proposed FPGA architecture consists of a hybrid multiplexer / look-up-table logic block that has reduced area with respect to traditional architectures. Then, with the prospect that CGRA architectures hold, we develop an open-source framework, CGRA-ME, for the modelling and exploration of CGRAs. This unifying software framework incorporates, architecture description through a custom language, architecture modelling, application mapping, and RTL generation, and allows further development of CGRA architectures and related CAD tools throughout the research community. Within the CGRA-ME framework, a new architecture-agnostic application mapper formulated in an integer linear program was also developed for generic CGRAs. Through this dissertation, we have made headway towards more efficient reconfigurable architectures through architecture design and related CAD and are optimistic that these contributions will have positive impact on further research and industrial application of reconfigurable architectures.
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