5G系統接收機前端寬頻電路整合設計 = = Design of a re...
黃濬程

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  • 5G系統接收機前端寬頻電路整合設計 = = Design of a receiver front-end wideband integrated circuit for 5G systems /
  • Record Type: Language materials, printed : Monograph/item
    Title/Author: 5G系統接收機前端寬頻電路整合設計 =/ 黃濬程撰
    Reminder of title: Design of a receiver front-end wideband integrated circuit for 5G systems /
    remainder title: Design of a receiver front-end wideband integrated circuit for 5G systems
    Author: 黃濬程
    other author: 翁若敏
    Published: [花蓮縣] :[國立東華大學電機工程學系], : 2021,
    Description: [17], 107面 :圖,表 ;30公分
    Notes: 校內電子全文開放日期 2021/07/30
    Subject: 低雜訊放大器 -
    Online resource: http://134.208.29.108/cgi-bin/gs32/gsweb.cgi?o=dstdcdr&s=G0610823003.id&searchmode=basic電子全文(依作者授權而定)
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  • 1 records • Pages 1 •
 
GE0195684 五樓論文區 (5F Theses & Dissertations) 03.不外借_N 本校碩士論文 T 448.6 4432.5 2021 一般使用(Normal) On shelf 0
  • 1 records • Pages 1 •
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