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Transactions on high-performance emb...

Silvano, Cristina.

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Transactions on high-performance embedded architectures and compilers V

Record Type:	Electronic resources : Monograph/item
Title/Author:	Transactions on high-performance embedded architectures and compilers V/ edited by Cristina Silvano, Koen Bertels, Michael Schulte.
remainder title:	Transactions on high-performance embedded architectures and compilers 5
other author:	Silvano, Cristina.
Published:	Berlin, Heidelberg :Springer Berlin Heidelberg : : 2019.,
Description:	ix, 141 p. :ill., digital ;24 cm.
[NT 15003449]:	Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards -- Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.
Contained By:	Springer eBooks
Subject:	High performance computing. -
Online resource:	https://doi.org/10.1007/978-3-662-58834-5
ISBN:	9783662588345

Transactions on high-performance embedded architectures and compilers V
Transactions on high-performance embedded architectures and compilers V[electronic resource] /Transactions on high-performance embedded architectures and compilers 5edited by Cristina Silvano, Koen Bertels, Michael Schulte. - Berlin, Heidelberg :Springer Berlin Heidelberg :2019. - ix, 141 p. :ill., digital ;24 cm. - Lecture notes in computer science,112250302-9743 ;. - Lecture notes in computer science ;11225..

Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards -- Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This 5th issue contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers cover research on embedded processor hardware/software design and integration and present challenging research trends.

ISBN: 9783662588345

Standard No.: 10.1007/978-3-662-58834-5doiSubjects--Topical Terms:

591827
High performance computing.

LC Class. No.: QA76.88

Dewey Class. No.: 004.3

Transactions on high-performance embedded architectures and compilers V
LDR:03071nmm a2200373 a 4500 001 2179787
003 DE-He213
005 20190222141524.0
006 m d
007 cr nn 008maaau
008 191122s2019 gw s 0 eng d
020 $a 9783662588345 $q (electronic bk.)
020 $a 9783662588338 $q (paper)
024 7 $a 10.1007/978-3-662-58834-5 $2 doi
035 $a 978-3-662-58834-5
040 $a GP $c GP
041 0 $a eng
050 4 $a QA76.88
072 7 $a UMB $2 bicssc
072 7 $a COM036000 $2 bisacsh
072 7 $a UMB $2 thema
072 7 $a UYF $2 thema
082 0 4 $a 004.3 $2 23
090 $a QA76.88 $b .T772 2019
245 0 0 $a Transactions on high-performance embedded architectures and compilers V $h [electronic resource] / $c edited by Cristina Silvano, Koen Bertels, Michael Schulte.
246 3 $a Transactions on high-performance embedded architectures and compilers 5
260 $a Berlin, Heidelberg : $b Springer Berlin Heidelberg : $b Imprint: Springer, $c 2019.
300 $a ix, 141 p. : $b ill., digital ; $c 24 cm.
490 1 $a Lecture notes in computer science, $x 0302-9743 ; $v 11225
490 1 $a Transactions on high-performance embedded architectures and compilers
505 0 $a Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards -- Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.
520 $a Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems. This 5th issue contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers cover research on embedded processor hardware/software design and integration and present challenging research trends.
650 0 $a High performance computing. $3 591827
650 0 $a Embedded computer systems. $3 582088
650 0 $a Compilers (Computer programs) $3 535138
650 1 4 $a Arithmetic and Logic Structures. $3 893182
650 2 4 $a Control Structures and Microprogramming. $3 895886
650 2 4 $a Logic Design. $3 892735
650 2 4 $a Computer System Implementation. $3 892710
650 2 4 $a Operating Systems. $3 892491
650 2 4 $a Programming Languages, Compilers, Interpreters. $3 891123
700 1 $a Silvano, Cristina. $3 1530142
700 1 $a Bertels, Koen. $3 1566535
700 1 $a Schulte, Michael. $3 2084935
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer eBooks
830 0 $a Lecture notes in computer science ; $v 11225. $3 3385248
830 0 $a Transactions on high-performance embedded architectures and compilers. $3 3385249
856 4 0 $u https://doi.org/10.1007/978-3-662-58834-5
950 $a Computer Science (Springer-11645)