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Digital subsampling phase lock techn...

Markulic, Nereo.

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Digital subsampling phase lock techniques for frequency synthesis and polar transmission

Record Type:	Electronic resources : Monograph/item
Title/Author:	Digital subsampling phase lock techniques for frequency synthesis and polar transmission/ by Nereo Markulic ... [et al.].
other author:	Markulic, Nereo.
Published:	Cham :Springer International Publishing : : 2019.,
Description:	xxiii, 138 p. :ill. (some col.), digital ;24 cm.
[NT 15003449]:	Chapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.
Contained By:	Springer eBooks
Subject:	Phase-locked loops. -
Online resource:	https://doi.org/10.1007/978-3-030-10958-5
ISBN:	9783030109585

Digital subsampling phase lock techniques for frequency synthesis and polar transmission
Digital subsampling phase lock techniques for frequency synthesis and polar transmission[electronic resource] /by Nereo Markulic ... [et al.]. - Cham :Springer International Publishing :2019. - xxiii, 138 p. :ill. (some col.), digital ;24 cm. - Analog circuits and signal processing,1872-082X. - Analog circuits and signal processing..

Chapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.

This book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today's art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results.

ISBN: 9783030109585

Standard No.: 10.1007/978-3-030-10958-5doiSubjects--Topical Terms:

653969
Phase-locked loops.

LC Class. No.: TK7872.P38

Dewey Class. No.: 621.3815364

Digital subsampling phase lock techniques for frequency synthesis and polar transmission
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245 0 0 $a Digital subsampling phase lock techniques for frequency synthesis and polar transmission $h [electronic resource] / $c by Nereo Markulic ... [et al.].
260 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2019.
300 $a xxiii, 138 p. : $b ill. (some col.), digital ; $c 24 cm.
490 1 $a Analog circuits and signal processing, $x 1872-082X
505 0 $a Chapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.
520 $a This book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today's art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results.
650 0 $a Phase-locked loops. $3 653969
650 0 $a Integrated circuits. $3 584067
650 1 4 $a Circuits and Systems. $3 896527
650 2 4 $a Electronic Circuits and Devices. $3 1245773
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 893838
700 1 $a Markulic, Nereo. $3 3384610
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer eBooks
830 0 $a Analog circuits and signal processing. $3 1565978
856 4 0 $u https://doi.org/10.1007/978-3-030-10958-5
950 $a Engineering (Springer-11647)