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Power-Efficient Two-Step Pipelined A...

Lee, Ho-Young.

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Power-Efficient Two-Step Pipelined Analog-to-Digital Conversion.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Power-Efficient Two-Step Pipelined Analog-to-Digital Conversion./
Author:	Lee, Ho-Young.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2011,
Description:	126 p.
Notes:	Source: Dissertation Abstracts International, Volume: 73-05, Section: B, page: 3147.
Contained By:	Dissertation Abstracts International73-05B.
Subject:	Electrical engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3493221
ISBN:	9781267136589

Power-Efficient Two-Step Pipelined Analog-to-Digital Conversion.
Lee, Ho-Young.

Power-Efficient Two-Step Pipelined Analog-to-Digital Conversion. - Ann Arbor : ProQuest Dissertations & Theses, 2011 - 126 p.

Source: Dissertation Abstracts International, Volume: 73-05, Section: B, page: 3147.

Thesis (Ph.D.)--Oregon State University, 2011.

This item is not available from ProQuest Dissertations & Theses.

Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which is generally known as one of the most power-consuming analog-to-digital converters.

ISBN: 9781267136589Subjects--Topical Terms:

649834
Electrical engineering.

Power-Efficient Two-Step Pipelined Analog-to-Digital Conversion.
LDR:03012nmm a2200337 4500 001 2157503
005 20180605073452.5
008 190424s2011 ||||||||||||||||| ||eng d
020 $a 9781267136589
035 $a (MiAaPQ)AAI3493221
035 $a AAI3493221
040 $a MiAaPQ $c MiAaPQ
100 1 $a Lee, Ho-Young. $3 3345313
245 1 0 $a Power-Efficient Two-Step Pipelined Analog-to-Digital Conversion.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2011
300 $a 126 p.
500 $a Source: Dissertation Abstracts International, Volume: 73-05, Section: B, page: 3147.
500 $a Adviser: Un-Ku Moon.
502 $a Thesis (Ph.D.)--Oregon State University, 2011.
506 $a This item is not available from ProQuest Dissertations & Theses.
520 $a Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which is generally known as one of the most power-consuming analog-to-digital converters.
520 $a In the first approach, an analog feedback loop of a residue amplifier in a two-step pipelined analog-to-digital converter is reconfigured digitally using a single comparator and an R-2R digital-to-analog converter. This comparator-based structure can reduce power consumption of a conventional two-step pipelined analog-to-digital converter which consists of an opamp-based residue amplifier followed by a second-stage analog-to-digital converter. In addition, this dissertation includes circuit design techniques that provide a digital offset correction for the comparator-based two-step structure, binary-weighted switching for an R-2R digital-to-analog converter, and reference trimming for a flash analog-to-digital converter. A 10-b prototype analog-to-digital converter achieves an FOM of 121 fJ/conversion-step under 0.7-V supply.
520 $a The second approach provides a way to achieve low power consumption for a high-resolution two-step pipelined analog-to-digital converter. An opamp is designed to consume optimized static power using a quarter-scaled residue gain together with minimized loading capacitance from the proposed second stage. A 14-b prototype analog-to-digital converter achieves an FOM of 31.3 fJ/conversion-step with an ENOB of 11.4 b, which is the lowest FOM in high-resolution analog-to-digital converters having greater than an ENOB of 10 b.
520 $a Finally, the potential for further power reduction in a two-step pipelined analog-to-digital converter is discussed as a topic for future research.
590 $a School code: 0172.
650 4 $a Electrical engineering. $3 649834
650 4 $a Computer engineering. $3 621879
690 $a 0544
690 $a 0464
710 2 $a Oregon State University. $3 625720
773 0 $t Dissertation Abstracts International $g 73-05B.
790 $a 0172
791 $a Ph.D.
792 $a 2011
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3493221