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VLSI design and test = 21st Internat...

VDAT (Symposium) (2017 :)

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VLSI design and test = 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers /

Record Type:	Electronic resources : Monograph/item
Title/Author:	VLSI design and test/ edited by Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh.
Reminder of title:	21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers /
remainder title:	VDAT 2017
other author:	Kaushik, Brajesh Kumar.
corporate name:	VDAT (Symposium)
Published:	Singapore :Springer Singapore : : 2017.,
Description:	xxi, 815 p. :ill., digital ;24 cm.
[NT 15003449]:	Digital design -- Analog/mixed signal -- VLSI testing -- Devices and technology -- VLSI architectures -- Emerging technologies and memory -- System design -- Low power design and test -- RF circuits -- Architecture and CAD -- Design verification.
Contained By:	Springer eBooks
Subject:	Integrated circuits - Very large scale integration -
Online resource:	http://dx.doi.org/10.1007/978-981-10-7470-7
ISBN:	9789811074707

VLSI design and test = 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers /
VLSI design and test21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers /[electronic resource] :VDAT 2017edited by Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh. - Singapore :Springer Singapore :2017. - xxi, 815 p. :ill., digital ;24 cm. - Communications in computer and information science,7111865-0929 ;. - Communications in computer and information science ;711..

Digital design -- Analog/mixed signal -- VLSI testing -- Devices and technology -- VLSI architectures -- Emerging technologies and memory -- System design -- Low power design and test -- RF circuits -- Architecture and CAD -- Design verification.

This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017. The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

ISBN: 9789811074707

Standard No.: 10.1007/978-981-10-7470-7doiSubjects--Topical Terms:

699885
Integrated circuits
--Very large scale integration

LC Class. No.: TK7874.75

Dewey Class. No.: 621.395

VLSI design and test = 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers /
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