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Invasive tightly coupled processor a...

Lari, Vahid.

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Invasive tightly coupled processor arrays

Record Type:	Electronic resources : Monograph/item
Title/Author:	Invasive tightly coupled processor arrays/ by Vahid Lari.
Author:	Lari, Vahid.
Published:	Singapore :Springer Singapore : : 2016.,
Description:	xxiii, 149 p. :ill. (some col.), digital ;24 cm.
[NT 15003449]:	Introduction -- Invasive Tightly Coupled Processor Arrays -- Self-adaptive Power and Energy Management for TCPAs -- On-Demand Fault Tolerance on Massively Parallel Processor Arrays -- Conclusions and Future Work.
Contained By:	Springer eBooks
Subject:	Array processors. -
Online resource:	http://dx.doi.org/10.1007/978-981-10-1058-3
ISBN:	9789811010583

Invasive tightly coupled processor arrays
Lari, Vahid.

Invasive tightly coupled processor arrays[electronic resource] /by Vahid Lari. - Singapore :Springer Singapore :2016. - xxiii, 149 p. :ill. (some col.), digital ;24 cm. - Computer architecture and design methodologies,2367-3478. - Computer architecture and design methodologies..

Introduction -- Invasive Tightly Coupled Processor Arrays -- Self-adaptive Power and Energy Management for TCPAs -- On-Demand Fault Tolerance on Massively Parallel Processor Arrays -- Conclusions and Future Work.

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs.

ISBN: 9789811010583

Standard No.: 10.1007/978-981-10-1058-3doiSubjects--Topical Terms:

1069558
Array processors.

LC Class. No.: QA76.5

Dewey Class. No.: 004.35

Invasive tightly coupled processor arrays
LDR:02559nmm a2200325 a 4500 001 2043637
003 DE-He213
005 20160708162022.0
006 m d
007 cr nn 008maaau
008 170217s2016 si s 0 eng d
020 $a 9789811010583 $q (electronic bk.)
020 $a 9789811010576 $q (paper)
024 7 $a 10.1007/978-981-10-1058-3 $2 doi
035 $a 978-981-10-1058-3
040 $a GP $c GP
041 0 $a eng
050 4 $a QA76.5
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
082 0 4 $a 004.35 $2 23
090 $a QA76.5 $b .L323 2016
100 1 $a Lari, Vahid. $3 2203504
245 1 0 $a Invasive tightly coupled processor arrays $h [electronic resource] / $c by Vahid Lari.
260 $a Singapore : $b Springer Singapore : $b Imprint: Springer, $c 2016.
300 $a xxiii, 149 p. : $b ill. (some col.), digital ; $c 24 cm.
490 1 $a Computer architecture and design methodologies, $x 2367-3478
505 0 $a Introduction -- Invasive Tightly Coupled Processor Arrays -- Self-adaptive Power and Energy Management for TCPAs -- On-Demand Fault Tolerance on Massively Parallel Processor Arrays -- Conclusions and Future Work.
520 $a This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs.
650 0 $a Array processors. $3 1069558
650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Processor Architectures. $3 892680
650 2 4 $a Electronic Circuits and Devices. $3 1245773
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer eBooks
830 0 $a Computer architecture and design methodologies. $3 2203505
856 4 0 $u http://dx.doi.org/10.1007/978-981-10-1058-3
950 $a Engineering (Springer-11647)