東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back

Switch To: Labeled | MARC Mode | ISBD

Low power interconnect design

Saini, Sandeep.

Linked to FindBook

Google Book

Amazon

博客來

Low power interconnect design

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Low power interconnect design/ by Sandeep Saini.
Author:	Saini, Sandeep.
Published:	New York, NY :Springer New York : : 2015.,
Description:	xvii, 152 p. :ill. (some col.), digital ;24 cm.
[NT 15003449]:	Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.
Contained By:	Springer eBooks
Subject:	Interconnects (Integrated circuit technology) - Design. -
Online resource:	http://dx.doi.org/10.1007/978-1-4614-1323-3
ISBN:	9781461413233 (electronic bk.)

Low power interconnect design
Saini, Sandeep.

Low power interconnect design[electronic resource] /by Sandeep Saini. - New York, NY :Springer New York :2015. - xvii, 152 p. :ill. (some col.), digital ;24 cm.

Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.

ISBN: 9781461413233 (electronic bk.)

Standard No.: 10.1007/978-1-4614-1323-3doiSubjects--Topical Terms:

2131821
Interconnects (Integrated circuit technology)
--Design.

LC Class. No.: TK7874.53

Dewey Class. No.: 621.3815

Low power interconnect design
LDR:01259nam a2200301 a 4500 001 2007637
003 DE-He213
005 20160120134612.0
006 m d
007 cr nn 008maaau
008 160219s2015 nyu s 0 eng d
020 $a 9781461413233 (electronic bk.)
020 $a 9781461413226 (paper)
024 7 $a 10.1007/978-1-4614-1323-3 $2 doi
035 $a 978-1-4614-1323-3
040 $a GP $c GP
041 0 $a eng
050 4 $a TK7874.53
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
082 0 4 $a 621.3815 $2 23
090 $a TK7874.53 $b .S132 2015
100 1 $a Saini, Sandeep. $3 2156552
245 1 0 $a Low power interconnect design $h [electronic resource] / $c by Sandeep Saini.
260 $a New York, NY : $b Springer New York : $b Imprint: Springer, $c 2015.
300 $a xvii, 152 p. : $b ill. (some col.), digital ; $c 24 cm.
505 0 $a Part I Basics of Interconnect Design -- Introduction to Interconnects -- CMOS Buffer -- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design -- Buffer Insertion as a Solution to Interconnect Issues -- Schmidt Trigger Approach -- Part III Bus Coding Techniques for Low Power Interconnect Design -- Bus Coding Techniques.
650 0 $a Interconnects (Integrated circuit technology) $x Design. $3 2131821
650 1 4 $a Engineering. $3 586835
650 2 4 $a Circuits and Systems. $3 896527
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 893838
650 2 4 $a Processor Architectures. $3 892680
710 2 $a SpringerLink (Online service) $3 836513
773 0 $t Springer eBooks
856 4 0 $u http://dx.doi.org/10.1007/978-1-4614-1323-3
950 $a Engineering (Springer-11647)