東華大學圖書館 |

語系: 繁體中文

說明(常見問題)

回圖書館首頁

手機版館藏查詢

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

Development of modeling, simulation ...

Zhu, Lin.

FindBook

Google Book

Amazon

博客來

Development of modeling, simulation and measurement methodologies for signal integrity analysis of high-speed packaging interconnects.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Development of modeling, simulation and measurement methodologies for signal integrity analysis of high-speed packaging interconnects./
作者:	Zhu, Lin.
面頁冊數:	154 p.
附註:	Source: Dissertation Abstracts International, Volume: 66-12, Section: B, page: 6844.
Contained By:	Dissertation Abstracts International66-12B.
標題:	Engineering, Electronics and Electrical. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3200619
ISBN:	0542459809

Development of modeling, simulation and measurement methodologies for signal integrity analysis of high-speed packaging interconnects.
Zhu, Lin.

Development of modeling, simulation and measurement methodologies for signal integrity analysis of high-speed packaging interconnects. - 154 p.

Source: Dissertation Abstracts International, Volume: 66-12, Section: B, page: 6844.

Thesis (Ph.D.)--The University of Arizona, 2006.

As chip complexity and speed continue to increase, the packaging interconnects increasingly affect the performance of the electrical systems. Signal integrity analysis becomes exceedingly complex and important. The primary goal of this research is in-depth understanding of the signal integrity issue in high-speed chips and electronic systems, and development of modeling, simulation, and measurement methodologies for accurate and efficient characterization or prediction of the electrical characteristics of these on-chip and on-substrate packaging interconnects. The research is focused on three parts. First, a new broadband measurement method is proposed to determine the complex material properties of the dielectric materials in "as-packaged" environments, and to extract the frequency dependant RLGC parameters of the packaging interconnects. Second, a broadband CPW to microstrip via-less transition is developed to facilitate on-wafer measurement of microstrip based packaging structures. Third, microstrip lines over gridded ground plane are studied. Methodologies are proposed to efficiently simulate these structures in the frequency domain and time domain. SPICE compatible lumped-element models are developed. The methodologies and the lumped element models are verified by frequency domain and time domain measurement.

ISBN: 0542459809Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

Development of modeling, simulation and measurement methodologies for signal integrity analysis of high-speed packaging interconnects.
LDR:02264nmm 2200265 4500 001 1818823
005 20061003090440.5
008 130610s2006 eng d
020 $a 0542459809
035 $a (UnM)AAI3200619
035 $a AAI3200619
040 $a UnM $c UnM
100 1 $a Zhu, Lin. $3 1259455
245 1 0 $a Development of modeling, simulation and measurement methodologies for signal integrity analysis of high-speed packaging interconnects.
300 $a 154 p.
500 $a Source: Dissertation Abstracts International, Volume: 66-12, Section: B, page: 6844.
500 $a Adviser: Kathleen L. Melde.
502 $a Thesis (Ph.D.)--The University of Arizona, 2006.
520 $a As chip complexity and speed continue to increase, the packaging interconnects increasingly affect the performance of the electrical systems. Signal integrity analysis becomes exceedingly complex and important. The primary goal of this research is in-depth understanding of the signal integrity issue in high-speed chips and electronic systems, and development of modeling, simulation, and measurement methodologies for accurate and efficient characterization or prediction of the electrical characteristics of these on-chip and on-substrate packaging interconnects. The research is focused on three parts. First, a new broadband measurement method is proposed to determine the complex material properties of the dielectric materials in "as-packaged" environments, and to extract the frequency dependant RLGC parameters of the packaging interconnects. Second, a broadband CPW to microstrip via-less transition is developed to facilitate on-wafer measurement of microstrip based packaging structures. Third, microstrip lines over gridded ground plane are studied. Methodologies are proposed to efficiently simulate these structures in the frequency domain and time domain. SPICE compatible lumped-element models are developed. The methodologies and the lumped element models are verified by frequency domain and time domain measurement.
590 $a School code: 0009.
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0544
710 2 0 $a The University of Arizona. $3 1017508
773 0 $t Dissertation Abstracts International $g 66-12B.
790 1 0 $a Melde, Kathleen L., $e advisor
790 $a 0009
791 $a Ph.D.
792 $a 2006
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3200619