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古閔升
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Titles
容忍多重時序錯誤之管線化電路設計 = = Design of Pipelined Circuits for Tolerating Multiple Timing Errors /
by: 國立東華大學電子工程研究所; 古閔升; 紀新洲
(Language materials, printed)
Subjects
錯誤容忍
錯誤復原設計
時序錯誤
超大型積體電路設計
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