Hachtel, Gary D.
概要
| 作品: | 2 作品在 0 項出版品 0 種語言 | |
|---|---|---|
書目資訊
Logic synthesis and verification algorithms
by:
Somenzi, Fabio.; SpringerLink (Online service); Hachtel, Gary D.
(書目-語言資料,印刷品)
Logic minimization algorithms for VLSI synthesis /
by:
Brayton, Robert King.; Hachtel, Gary D.; McMullen, Curtis T.; Sangiovanni-Vincentelli, Alberto L.
(書目-語言資料,印刷品)