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Verification by error modeling : = u...

Zilic, Zeljko.

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Verification by error modeling : = using testing techniques in hardware verification

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Verification by error modeling :/ written by Katarzyna Radecka, Zeljko Zilic.
Reminder of title:	using testing techniques in hardware verification
Author:	Radecka, Katarzyna.
other author:	Zilic, Zeljko.
Published:	Boston :Springer Science + Business Media, Inc., : c2004.,
Description:	xiv, 216 p. :ill., digital ;25 cm.
Series:	Frontiers in electronic testing ;
Contained By:	Springer e-books
Subject:	Error analysis (Mathematics) -
Online resource:	http://dx.doi.org/10.1007/b105974
ISBN:	9780306487392 (electronic bk.)

Verification by error modeling : = using testing techniques in hardware verification
Radecka, Katarzyna.

Verification by error modeling :using testing techniques in hardware verification[electronic resource] /written by Katarzyna Radecka, Zeljko Zilic. - Boston :Springer Science + Business Media, Inc.,c2004. - xiv, 216 p. :ill., digital ;25 cm. - Frontiers in electronic testing ;25.

ISBN: 9780306487392 (electronic bk.)Subjects--Topical Terms:

549972
Error analysis (Mathematics)

LC Class. No.: TK7874.75 / .R33 2004

Dewey Class. No.: 621.395

Verification by error modeling : = using testing techniques in hardware verification
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020 $a 9780306487392 (electronic bk.)
020 $a 9781402076527 (paper)
035 $a 978-1-4020-7652-7
050 0 0 $a TK7874.75 $b .R33 2004
082 0 0 $a 621.395 $2 22
100 1 $a Radecka, Katarzyna. $3 830954
245 1 0 $a Verification by error modeling : $b using testing techniques in hardware verification $h [electronic resource] / $c written by Katarzyna Radecka, Zeljko Zilic.
260 $a Boston : $c c2004. $b Springer Science + Business Media, Inc.,
300 $a xiv, 216 p. : $b ill., digital ; $c 25 cm.
440 0 $a Frontiers in electronic testing ; $v 25
650 0 $a Error analysis (Mathematics) $3 549972
650 0 $a Integrated circuits $x Verification. $3 827163
650 0 $a Integrated circuits $x Very large scale integration $x Computer-aided design. $3 715562
700 1 $a Zilic, Zeljko. $3 830953
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773 0 $t Springer e-books
856 4 0 $u http://dx.doi.org/10.1007/b105974
950 $a Engineering