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CMOS SRAM circuit design and paramet...
~
Sachdev, Manoj.
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CMOS SRAM circuit design and parametric test in nano-scaled technologies = process-aware SRAM design and test /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
CMOS SRAM circuit design and parametric test in nano-scaled technologies/ by Andrei Pavlov, Manoj Sachdev.
Reminder of title:
process-aware SRAM design and test /
Author:
Pavlov, Andrei.
other author:
Sachdev, Manoj.
Published:
Dordrecht :Springer Science + Business Media B.V, : 2008.,
Description:
212 p. :ill., digital ;24 cm.
Series:
Frontiers in electronic testing ;
Contained By:
Springer eBooks
Subject:
Metal oxide semiconductors, Complementary - Design. -
Online resource:
http://dx.doi.org/10.1007/978-1-4020-8363-1http://dx.doi.org/10.1007/978-1-4020-8363-1
ISBN:
9781402083624 (paper)
CMOS SRAM circuit design and parametric test in nano-scaled technologies = process-aware SRAM design and test /
Pavlov, Andrei.
CMOS SRAM circuit design and parametric test in nano-scaled technologies
process-aware SRAM design and test /[electronic resource] :by Andrei Pavlov, Manoj Sachdev. - Dordrecht :Springer Science + Business Media B.V,2008. - 212 p. :ill., digital ;24 cm. - Frontiers in electronic testing ;40.
ISBN: 9781402083624 (paper)Subjects--Topical Terms:
898421
Metal oxide semiconductors, Complementary
--Design.
Dewey Class. No.: 621.38152
CMOS SRAM circuit design and parametric test in nano-scaled technologies = process-aware SRAM design and test /
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Engineering (Springer-11647; ZDB-2-ENG)
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