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System-on-chip test architectures : ...
~
Wang, Laung-Terng.
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System-on-chip test architectures : = nanometer design for testability /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
System-on-chip test architectures :/ edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.
Reminder of title:
nanometer design for testability /
other author:
Wang, Laung-Terng.
Published:
Amsterdam ;Morgan Kaufmann Publishers, : c2008.,
Description:
xxxvi, 856 p. :ill. ;25 cm.
Series:
The Morgan Kaufmann series in systems on silicon
Subject:
Systems on a chip - Testing. -
Online resource:
http://www.loc.gov/catdir/toc/ecip0719/2007023373.htmlhttp://www.loc.gov/catdir/toc/ecip0719/2007023373.html
Online resource:
http://www.loc.gov/catdir/enhancements/fy0808/2007023373-d.htmlhttp://www.loc.gov/catdir/enhancements/fy0808/2007023373-d.html
ISBN:
9780123739735$b(hardcover : alk. paper) :
System-on-chip test architectures : = nanometer design for testability /
System-on-chip test architectures :
nanometer design for testability /edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba. - Amsterdam ;Morgan Kaufmann Publishers,c2008. - xxxvi, 856 p. :ill. ;25 cm. - The Morgan Kaufmann series in systems on silicon.
Includes bibliographical references and index.
ISBN: 9780123739735$b(hardcover : alk. paper) :NT$1071
LCCN: 2007023373Subjects--Topical Terms:
629091
Systems on a chip
--Testing.
LC Class. No.: TK7895.E42 / S978 2008
Dewey Class. No.: 621.39/5
System-on-chip test architectures : = nanometer design for testability /
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edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.
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六樓西文書區HC-Z(6F Western Language Books)
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1
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F0057497
六樓西文書區HC-Z(6F Western Language Books)
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TK7895.E42 S978 2008
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