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Development of large-area and multil...

Zhang, Wei.

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Development of large-area and multilevel nanoimprint lithography and the application in MOSFETs.

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Development of large-area and multilevel nanoimprint lithography and the application in MOSFETs./
作者:	Zhang, Wei.
面頁冊數:	133 p.
附註:	Adviser: Stephen Y. Chou.
Contained By:	Dissertation Abstracts International62-06B.
標題:	Engineering, Electronics and Electrical. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3017462
ISBN:	0493284885

Development of large-area and multilevel nanoimprint lithography and the application in MOSFETs.
Zhang, Wei.

Development of large-area and multilevel nanoimprint lithography and the application in MOSFETs. - 133 p.

Adviser: Stephen Y. Chou.

Thesis (Ph.D.)--Princeton University, 2001.

Nanoimprint lithography (NIL) is a sub-100 nm lithography with high throughput and low cost, which is needed for nanostructure engineering. This thesis developed large area imprint and multilevel alignment of NIL, and demonstrated working MOSFETs over 4&inches; wafer with all (4) layers fabricated by NIL.

ISBN: 0493284885Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

Development of large-area and multilevel nanoimprint lithography and the application in MOSFETs.
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100 1 $a Zhang, Wei. $3 1043738
245 1 0 $a Development of large-area and multilevel nanoimprint lithography and the application in MOSFETs.
300 $a 133 p.
500 $a Adviser: Stephen Y. Chou.
500 $a Source: Dissertation Abstracts International, Volume: 62-06, Section: B, page: 2894.
502 $a Thesis (Ph.D.)--Princeton University, 2001.
520 $a Nanoimprint lithography (NIL) is a sub-100 nm lithography with high throughput and low cost, which is needed for nanostructure engineering. This thesis developed large area imprint and multilevel alignment of NIL, and demonstrated working MOSFETs over 4&inches; wafer with all (4) layers fabricated by NIL.
520 $a The development of large area imprint requires a flat resist surface for uniform pattern transfer over large area. Factors, which affect the surface variation of resist during imprint, such as resist viscosity, substrate shear strengths of mask and wafer, imprint pressure, and surface friction, were investigated. An imprint principle named as TOM (Top of Mark), which uses inert gas to apply uniform pressure during imprint, has been developed, and demonstrated to greatly improve resist flow during imprint. Uniform large area imprint was achieved over whole 4&inches; wafers with the TOM imprint and resists of good flow capability.
520 $a A multilevel NIL system, which consists of a contact aligner, a transportation holder and an imprint machine of TOM imprint principle, has been developed. Sub-micron alignment accuracy over 4&inches; wafers by multilevel NIL was demonstrated on the system. Issues critical to achieving multilevel NIL, such as imprint machine, relative thermal expansion, wafer bending and resists, were discussed. The process of multilevel NIL developed in the thesis has the potential to achieve sub-100 nm alignment accuracy over 4&inches; wafers.
520 $a Operating MOSFETs over 4&inches; wafer with all (4) layers fabricated by NIL was demonstrated. The 4-level NIL process, consisting of a single layer NIL and three multilevel NIL, defined “active area”, “gate”, “Via”, and “metal contact” of the MOSFETs. Sub-micron overlay accuracy over the whole 4&inches; wafer for the MOSFETs was achieved in the fabrication.
520 $a High-resolution electron beam lithography (EBL) is studied in this thesis, since it is used to make high-resolution NIL masks. Metal dot array of 4–7 nm diameters and 30 nm period was demonstrated by EBL using polymethyl methacrylate (PMMA) as a positive resist and lift-off. Polystyrene grating with 15 nm line width and 30 nm period was demonstrated by EBL using polystyrene as a negative resist.
590 $a School code: 0181.
650 4 $a Engineering, Electronics and Electrical. $3 626636
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710 2 0 $a Princeton University. $3 645579
773 0 $t Dissertation Abstracts International $g 62-06B.
790 $a 0181
790 1 0 $a Chou, Stephen Y., $e advisor
791 $a Ph.D.
792 $a 2001
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