東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back to Search results for [ null ]

Switch To: Labeled | MARC Mode | ISBD

Embedded DSP processor design = appl...

ScienceDirect (Online service)

Linked to FindBook

Google Book

Amazon

博客來

Embedded DSP processor design = application specific instruction set processors /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Embedded DSP processor design/ Dake Liu.
Reminder of title:	application specific instruction set processors /
Author:	Liu, Dake,
Published:	Amsterdam ;Morgan Kaufmann/Elsevier, : c2008.,
Description:	xxvi, 778 p. :ill. ;25 cm.
Series:	The Morgan Kaufmann series in systems on silicon
[NT 15003449]:	Introduction -- Numerical representation and finite-length DSP -- DSP architectures -- DSP ASIP design flow -- A simple DSP core : the junior processor -- Code profiling for ASIP design -- Assembly instruction set design -- Software development toolchain -- Evaluation of an instruction set -- Design of DSP microarchitecture -- Design of register file and register bus -- ALU HW implementation -- MAC hardware implementation -- Control path design -- Design of memory subsystems -- DSP core peripherals -- Design for DSP functional acceleration -- Real-time fixed-point DSP firmware -- ASIP integration and verification -- Parallel streaming signal processing.
Subject:	Application-specific integrated circuits. -
Online resource:	http://www.sciencedirect.com/science/book/9780123741233An electronic book accessible through the World Wide Web; click for information
ISBN:	0123741238

Embedded DSP processor design = application specific instruction set processors /
Liu, Dake,1957-

Embedded DSP processor designapplication specific instruction set processors /[electronic resource] :Dake Liu. - Amsterdam ;Morgan Kaufmann/Elsevier,c2008. - xxvi, 778 p. :ill. ;25 cm. - The Morgan Kaufmann series in systems on silicon.

Includes bibliographical references and index.

Introduction -- Numerical representation and finite-length DSP -- DSP architectures -- DSP ASIP design flow -- A simple DSP core : the junior processor -- Code profiling for ASIP design -- Assembly instruction set design -- Software development toolchain -- Evaluation of an instruction set -- Design of DSP microarchitecture -- Design of register file and register bus -- ALU HW implementation -- MAC hardware implementation -- Control path design -- Design of memory subsystems -- DSP core peripherals -- Design for DSP functional acceleration -- Real-time fixed-point DSP firmware -- ASIP integration and verification -- Parallel streaming signal processing.

This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers. Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples. FOR INSTRUCTORS: To obtain access to the solutions manual for this title simply register on our textbook website (textbooks.elsevier.com)and request access to the Computer Science or Electronics and Electrical Engineering subject area. Once approved (usually within one business day) you will be able to access all of the instructor-only materials through the ";Instructor Manual"; link on this book's full web page. * Instruction set design for application specific processors based on fast application profiling * Micro architecture design methodology * Micro architecture design details based on real examples * Extendable architecture design protocols * Design for efficient memory sub systems (minimizing on chip memory and cost) * Real example designs based on extensive, industrial experiences.

Electronic reproduction.
Amsterdam :
Elsevier Science & Technology,
2008.

Mode of access: World Wide Web.

ISBN: 0123741238

Source: 140401:140539Elsevier Science & Technologyhttp://www.sciencedirect.comSubjects--Topical Terms:

1000335
Application-specific integrated circuits.
Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: TK7895.E42 / L58 2008eb

Dewey Class. No.: 621.39/16

Embedded DSP processor design = application specific instruction set processors /
LDR:03450cam 2200313 a 45 001 841366
003 OCoLC
005 20100601
006 m d
007 cr cn|||||||||
008 100601s2008 ne a sb 001 0 eng d
020 $a 0123741238
020 $a 9780123741233
035 $a (OCoLC)281597544
035 $a ocn281597544
037 $a 140401:140539 $b Elsevier Science & Technology $n http://www.sciencedirect.com
040 $a OPELS $b eng $c OPELS $d OPELS
049 $a TEFA
050 1 4 $a TK7895.E42 $b L58 2008eb
082 0 4 $a 621.39/16 $2 22
100 1 $a Liu, Dake, $d 1957- $3 1000334
245 1 0 $a Embedded DSP processor design $h [electronic resource] : $b application specific instruction set processors / $c Dake Liu.
260 $a Amsterdam ; $a Boston : $c c2008. $b Morgan Kaufmann/Elsevier,
300 $a xxvi, 778 p. : $b ill. ; $c 25 cm.
440 4 $a The Morgan Kaufmann series in systems on silicon
504 $a Includes bibliographical references and index.
505 0 $a Introduction -- Numerical representation and finite-length DSP -- DSP architectures -- DSP ASIP design flow -- A simple DSP core : the junior processor -- Code profiling for ASIP design -- Assembly instruction set design -- Software development toolchain -- Evaluation of an instruction set -- Design of DSP microarchitecture -- Design of register file and register bus -- ALU HW implementation -- MAC hardware implementation -- Control path design -- Design of memory subsystems -- DSP core peripherals -- Design for DSP functional acceleration -- Real-time fixed-point DSP firmware -- ASIP integration and verification -- Parallel streaming signal processing.
520 $a This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers. Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples. FOR INSTRUCTORS: To obtain access to the solutions manual for this title simply register on our textbook website (textbooks.elsevier.com)and request access to the Computer Science or Electronics and Electrical Engineering subject area. Once approved (usually within one business day) you will be able to access all of the instructor-only materials through the ";Instructor Manual"; link on this book's full web page. * Instruction set design for application specific processors based on fast application profiling * Micro architecture design methodology * Micro architecture design details based on real examples * Extendable architecture design protocols * Design for efficient memory sub systems (minimizing on chip memory and cost) * Real example designs based on extensive, industrial experiences.
533 $a Electronic reproduction. $b Amsterdam : $c Elsevier Science & Technology, $d 2008. $n Mode of access: World Wide Web. $n System requirements: Web browser. $n Title from title screen (viewed on Dec. 9, 2008). $n Access may be restricted to users at subscribing institutions.
650 0 $a Application-specific integrated circuits. $3 1000335
650 0 $a Digital integrated circuits. $3 527271
650 0 $a Embedded computer systems. $3 582088
650 0 $a Signal processing $x Digital techniques. $3 624853
655 7 $a Electronic books. $2 lcsh $3 542853
710 2 $a ScienceDirect (Online service) $3 848416
856 4 0 $3 ScienceDirect $u http://www.sciencedirect.com/science/book/9780123741233 $z An electronic book accessible through the World Wide Web; click for information
994 $a C0 $b TEF