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Exploring Multi-Valued Logic in Ultr...

Xu, Piaohan,

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Exploring Multi-Valued Logic in Ultra-Scaled Transistors Through Simulation /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Exploring Multi-Valued Logic in Ultra-Scaled Transistors Through Simulation // Piaohan Xu.
作者:	Xu, Piaohan,
面頁冊數:	1 electronic resource (151 pages)
附註:	Source: Dissertations Abstracts International, Volume: 86-12, Section: B.
Contained By:	Dissertations Abstracts International86-12B.
標題:	Physics. -
電子資源:	https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=32045681
ISBN:	9798280777019

Exploring Multi-Valued Logic in Ultra-Scaled Transistors Through Simulation /
Xu, Piaohan,

Exploring Multi-Valued Logic in Ultra-Scaled Transistors Through Simulation /Piaohan Xu. - 1 electronic resource (151 pages)

Source: Dissertations Abstracts International, Volume: 86-12, Section: B.

As transistors continue to shrink, quantum confinement effects significantly alter their behavior. Ultra-scaled transistors exhibit quantized subbands, enabling the possibility of multi-valued logic (MVL) based on discrete energy levels.While MVL has been demonstrated in earlier studies, those devices are often difficult to fabricate, incompatible with standard industry processes, or limited to cryogenic temperatures.Gate-all-around field-effect transistors (GAAFETs), the latest transistor architecture, now reach dimensions where quantum confinement is strong enough to yield thermally stable quantized states. To explore this, we employ a custom simulation tool that self-consistently solves the Schrödinger-Poisson equations in ultra-scaled transistors using a two-stage iterative process: Gauss-Seidel relaxation followed by secant method based convergence. The custom simulation tool offers full control over geometry, materials, and numerical methods, enabling the study of nonstandard transistor designs.A device concept was investigated to assess its potential for multi-valued logic (MVL) operation. Simulations reveal room-temperature-stable quantized states in the designed device and suggest that the energy separation between these states may be sufficient to enable MVL operation. This establishes a theoretical foundation for future studies.

English

ISBN: 9798280777019Subjects--Topical Terms:

516296
Physics.
Subjects--Index Terms:

GAAFETs

Exploring Multi-Valued Logic in Ultra-Scaled Transistors Through Simulation /
LDR:02740nmm a22004213i 4500 001 2433536
005 20250825062350.5
006 m o d
007 cr|nu||||||||
008 261011s2025 miu||||||m |||||||eng d
020 $a 9798280777019
035 $a (MiAaPQD)AAI32045681
035 $a AAI32045681
040 $a MiAaPQD $b eng $c MiAaPQD $e rda
100 1 $a Xu, Piaohan, $e author. $3 3823191
245 1 0 $a Exploring Multi-Valued Logic in Ultra-Scaled Transistors Through Simulation / $c Piaohan Xu.
264 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2025
300 $a 1 electronic resource (151 pages)
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
500 $a Source: Dissertations Abstracts International, Volume: 86-12, Section: B.
500 $a Advisors: Luo, Hong Committee members: Zeng, Hao; Petrou, Athos.
502 $b Ph.D. $c State University of New York at Buffalo $d 2025.
520 $a As transistors continue to shrink, quantum confinement effects significantly alter their behavior. Ultra-scaled transistors exhibit quantized subbands, enabling the possibility of multi-valued logic (MVL) based on discrete energy levels.While MVL has been demonstrated in earlier studies, those devices are often difficult to fabricate, incompatible with standard industry processes, or limited to cryogenic temperatures.Gate-all-around field-effect transistors (GAAFETs), the latest transistor architecture, now reach dimensions where quantum confinement is strong enough to yield thermally stable quantized states. To explore this, we employ a custom simulation tool that self-consistently solves the Schrödinger-Poisson equations in ultra-scaled transistors using a two-stage iterative process: Gauss-Seidel relaxation followed by secant method based convergence. The custom simulation tool offers full control over geometry, materials, and numerical methods, enabling the study of nonstandard transistor designs.A device concept was investigated to assess its potential for multi-valued logic (MVL) operation. Simulations reveal room-temperature-stable quantized states in the designed device and suggest that the energy separation between these states may be sufficient to enable MVL operation. This establishes a theoretical foundation for future studies.
546 $a English
590 $a School code: 0656
650 4 $a Physics. $3 516296
650 4 $a Applied mathematics. $3 2122814
650 4 $a Computational physics. $3 3343998
653 $a GAAFETs
653 $a Multi-valued logic
653 $a Custom simulation
653 $a Transistors
690 $a 0605
690 $a 0216
690 $a 0364
710 2 $a State University of New York at Buffalo. $b Physics. $e degree granting institution. $3 3823192
720 1 $a Luo, Hong $e degree supervisor.
773 0 $t Dissertations Abstracts International $g 86-12B.
790 $a 0656
791 $a Ph.D.
792 $a 2025
856 4 0 $u https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=32045681