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Top Gate Dielectric Engineering for ...

Ko, Jung-Soo,

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Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides // Jung-Soo Ko.
作者:	Ko, Jung-Soo,
面頁冊數:	1 electronic resource (109 pages)
附註:	Source: Dissertations Abstracts International, Volume: 86-05, Section: B.
Contained By:	Dissertations Abstracts International86-05B.
標題:	Aluminum. -
電子資源:	https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=31652047
ISBN:	9798346380863

Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides /
Ko, Jung-Soo,

Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides /Jung-Soo Ko. - 1 electronic resource (109 pages)

Source: Dissertations Abstracts International, Volume: 86-05, Section: B.

Silicon technology scaling is reaching its physical limits, which is triggering the need for alternative materials. Two-dimensional transition metal dichalcogenides (2D TMDs) are promising semiconductors showing good carrier mobility even at sub-nm channel thickness in metal oxide semiconductor (MOS) transistors. However, due to the lack of partially filled dangling bonds, atomic layer deposition (ALD) for ultrathin and highquality gate stacks on top of TMDs does not work well. As a result, fulfilling the technology requirement of sub-1 nm equivalent oxide thickness (EOT) on 2D TMDs has been challenging using industry-compatible materials and processes. In this work, I introduce three approaches to deposit ultrathin top gate dielectrics on 2D TMDs using CMOScompatible materials and processes that achieve 1-nm-scale top gate EOT.First, I investigate depositing ultrathin electron-beam evaporated seed layers that enable nucleation of high-κ dielectric ALD on monolayer MoS2 and WSe2. Several evaporated seed layer candidates (Si, Ge, Hf, Gd, La, Al2O3) are tested, and evaporated Si seed is revealed to work best for monolayer MoS2 transistors without damage and with good interfacial quality. Using Si seed layer followed by ALD of HfO2, top-gated monolayer TMD transistors are demonstrated which achieve top gate EOT of ~0.9 nm and minimum subthreshold swing of 70 mV/dec (at room temperature) with almost no hysteresis observed. This work also uncovers threshold voltage engineering by controlling the seed layer thicknesses.Next, I introduce nanofog aluminum oxide (AlOx) on monolayer MoS2 as the interfacial gate dielectric layer. Coverage of nanofog AlOx on monolayer MoS2 as a function of deposition temperature is studied, which reveals that deposition temperature of 50 °C provides most uniform coverage. Nanofog AlOx is also found to provide a high-quality dielectric interfacial layer on MoS2 compared to other seed layer deposition techniques. MoS2 transistors using nanofog AlOx followed by ALD HfO2 as top gate dielectric show negligible hysteresis and sufficiently good interface trap density that enable subthreshold swing of sub-100 mV/dec at room temperature. By using a bilayer gate dielectric stack of nanofog AlOx and HfO2, MoS2 transistors with 1-nm-scale top gate EOT are demonstrated with low gate leakage and excellent uniformity owing to the nanofog AlOx.

English

ISBN: 9798346380863Subjects--Topical Terms:

735071
Aluminum.

Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides /
LDR:03723nmm a22003853i 4500 001 2430657
005 20250527055724.5
006 m o d
007 cr|nu||||||||
008 261011s2024 miu||||||m |||||||eng d
020 $a 9798346380863
035 $a (MiAaPQD)AAI31652047
035 $a (MiAaPQD)Stanfordjs651kv0729
035 $a AAI31652047
040 $a MiAaPQD $b eng $c MiAaPQD $e rda
100 1 $a Ko, Jung-Soo, $e author. $3 3819086
245 1 0 $a Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides / $c Jung-Soo Ko.
264 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2024
300 $a 1 electronic resource (109 pages)
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
500 $a Source: Dissertations Abstracts International, Volume: 86-05, Section: B.
500 $a Advisors: Saraswat, Krishna Committee members: Chowdhury, Srabanti; Pop, Eric; Bent, Stacey F.
502 $b Ph.D. $c Stanford University $d 2024.
520 $a Silicon technology scaling is reaching its physical limits, which is triggering the need for alternative materials. Two-dimensional transition metal dichalcogenides (2D TMDs) are promising semiconductors showing good carrier mobility even at sub-nm channel thickness in metal oxide semiconductor (MOS) transistors. However, due to the lack of partially filled dangling bonds, atomic layer deposition (ALD) for ultrathin and highquality gate stacks on top of TMDs does not work well. As a result, fulfilling the technology requirement of sub-1 nm equivalent oxide thickness (EOT) on 2D TMDs has been challenging using industry-compatible materials and processes. In this work, I introduce three approaches to deposit ultrathin top gate dielectrics on 2D TMDs using CMOScompatible materials and processes that achieve 1-nm-scale top gate EOT.First, I investigate depositing ultrathin electron-beam evaporated seed layers that enable nucleation of high-κ dielectric ALD on monolayer MoS2 and WSe2. Several evaporated seed layer candidates (Si, Ge, Hf, Gd, La, Al2O3) are tested, and evaporated Si seed is revealed to work best for monolayer MoS2 transistors without damage and with good interfacial quality. Using Si seed layer followed by ALD of HfO2, top-gated monolayer TMD transistors are demonstrated which achieve top gate EOT of ~0.9 nm and minimum subthreshold swing of 70 mV/dec (at room temperature) with almost no hysteresis observed. This work also uncovers threshold voltage engineering by controlling the seed layer thicknesses.Next, I introduce nanofog aluminum oxide (AlOx) on monolayer MoS2 as the interfacial gate dielectric layer. Coverage of nanofog AlOx on monolayer MoS2 as a function of deposition temperature is studied, which reveals that deposition temperature of 50 °C provides most uniform coverage. Nanofog AlOx is also found to provide a high-quality dielectric interfacial layer on MoS2 compared to other seed layer deposition techniques. MoS2 transistors using nanofog AlOx followed by ALD HfO2 as top gate dielectric show negligible hysteresis and sufficiently good interface trap density that enable subthreshold swing of sub-100 mV/dec at room temperature. By using a bilayer gate dielectric stack of nanofog AlOx and HfO2, MoS2 transistors with 1-nm-scale top gate EOT are demonstrated with low gate leakage and excellent uniformity owing to the nanofog AlOx.
546 $a English
590 $a School code: 0212
650 4 $a Aluminum. $3 735071
650 4 $a Transmission electron microscopy. $3 567074
650 4 $a Electrons. $3 516581
650 4 $a Spectrum analysis. $3 520440
650 4 $a Graphene. $3 1569149
650 4 $a Transistors. $3 713271
650 4 $a Lasers. $3 535503
650 4 $a Grain boundaries. $3 748639
650 4 $a Molybdenum. $3 3681682
650 4 $a Analytical chemistry. $3 3168300
650 4 $a Atomic physics. $3 3173870
650 4 $a Optics. $3 517925
690 $a 0486
690 $a 0748
690 $a 0752
710 2 $a Stanford University. $e degree granting institution. $3 3765820
720 1 $a Saraswat, Krishna $e degree supervisor.
773 0 $t Dissertations Abstracts International $g 86-05B.
790 $a 0212
791 $a Ph.D.
792 $a 2024
856 4 0 $u https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=31652047