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Atomic Layer Deposited (ALD) SiO2 wi...

Siddiqui, Shahab,

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Atomic Layer Deposited (ALD) SiO2 with HiK/Metal Gate Dielectric for High Voltage Analog and I/O Devices on Silicon and High Mobility Silicon Germanium (SiGe) Channels: Planar, FinFET and GAA Transistor Architecture /

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Atomic Layer Deposited (ALD) SiO2 with HiK/Metal Gate Dielectric for High Voltage Analog and I/O Devices on Silicon and High Mobility Silicon Germanium (SiGe) Channels: Planar, FinFET and GAA Transistor Architecture // Shahab Siddiqui.
作者:	Siddiqui, Shahab,
面頁冊數:	1 electronic resource (239 pages)
附註:	Source: Dissertations Abstracts International, Volume: 85-10, Section: B.
Contained By:	Dissertations Abstracts International85-10B.
標題:	Electrical engineering. -
電子資源:	https://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=31235387
ISBN:	9798382262116

Atomic Layer Deposited (ALD) SiO2 with HiK/Metal Gate Dielectric for High Voltage Analog and I/O Devices on Silicon and High Mobility Silicon Germanium (SiGe) Channels: Planar, FinFET and GAA Transistor Architecture /
Siddiqui, Shahab,

Atomic Layer Deposited (ALD) SiO2 with HiK/Metal Gate Dielectric for High Voltage Analog and I/O Devices on Silicon and High Mobility Silicon Germanium (SiGe) Channels: Planar, FinFET and GAA Transistor Architecture /Shahab Siddiqui. - 1 electronic resource (239 pages)

Source: Dissertations Abstracts International, Volume: 85-10, Section: B.

A highly reliable SiO2 deposited by atomic layer deposition (ALD) as an I/O gate dielectric layer with high k/metal gate (HKMG) in high voltage I/O field effect transistor (FETs) for advanced CMOS technologies has been demonstrated. Improved process control, better gate oxide conformality, superior dielectric reliability (over CVD SiO2), and equivalent uniformity and reliability compared to thermal oxide proves its usefulness for FinFET, Gate-all-around(GAA), FDSOI and heterostructure Si/SiGe I/O devices. For the first-time, use of ALD SiO2 with novel interface layer results in reduced interfacial regrowth on SiGe channel, which when combined with novel post deposition nitridation and annealing for optimal performance, is an attractive I/O gate oxide option for alternate channel architectures.

English

ISBN: 9798382262116Subjects--Topical Terms:

649834
Electrical engineering.
Subjects--Index Terms:

CMOS Scaling

Atomic Layer Deposited (ALD) SiO2 with HiK/Metal Gate Dielectric for High Voltage Analog and I/O Devices on Silicon and High Mobility Silicon Germanium (SiGe) Channels: Planar, FinFET and GAA Transistor Architecture /
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520 $a A highly reliable SiO2 deposited by atomic layer deposition (ALD) as an I/O gate dielectric layer with high k/metal gate (HKMG) in high voltage I/O field effect transistor (FETs) for advanced CMOS technologies has been demonstrated. Improved process control, better gate oxide conformality, superior dielectric reliability (over CVD SiO2), and equivalent uniformity and reliability compared to thermal oxide proves its usefulness for FinFET, Gate-all-around(GAA), FDSOI and heterostructure Si/SiGe I/O devices. For the first-time, use of ALD SiO2 with novel interface layer results in reduced interfacial regrowth on SiGe channel, which when combined with novel post deposition nitridation and annealing for optimal performance, is an attractive I/O gate oxide option for alternate channel architectures.
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653 $a Transistors
653 $a Nano-sheet transistor
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