東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back to Search results for [ null ]

Switch To: Labeled | MARC Mode | ISBD

Linked to FindBook

Google Book

Amazon

博客來

Adaptive AI Algorithms for Generic Hardware & Unified Hardware Acceleration Architecture.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Adaptive AI Algorithms for Generic Hardware & Unified Hardware Acceleration Architecture./
Author:	Shi, Feng.
Published:	Ann Arbor : ProQuest Dissertations & Theses, : 2021,
Description:	199 p.
Notes:	Source: Dissertations Abstracts International, Volume: 83-03, Section: B.
Contained By:	Dissertations Abstracts International83-03B.
Subject:	Computer science. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=28646861
ISBN:	9798538117543

Adaptive AI Algorithms for Generic Hardware & Unified Hardware Acceleration Architecture.
Shi, Feng.

Adaptive AI Algorithms for Generic Hardware & Unified Hardware Acceleration Architecture. - Ann Arbor : ProQuest Dissertations & Theses, 2021 - 199 p.

Source: Dissertations Abstracts International, Volume: 83-03, Section: B.

Thesis (Ph.D.)--University of California, Los Angeles, 2021.

This item must not be sold to any third party vendors.

We are now in an era of the Big Bang of artificial intelligence (AI). In this wave of revolution, both industry and academia have cast numerous funds and resources. Machine learning, especially Deep Learning, has been widely deployed to replace the traditional algorithms in many domains, from the euclidean data domain to the non-euclidean domain. As the complexity and scale of the AI algorithms increase, the system host these algorithms requires more computational power and resources than before. Using the design of the modules of the video analytic platform as the use cases, we analyze the workload cost for computational resource and memory allocation during the execution of the system. The video analytic platform is a complex system that comprises various computer vision and decision-making tasks. Every module accomplishing a specific task is a stage in the pipeline of the video analytic platform. With the analyses mentioned above, we synthesize the adaptive AI algorithms from availability and variability perspectives, such as optimization with tensorization or matricization. We conceive the sparse Transformer and segmented linear Transformer as the critical components for the human action recognition task. The Constraint Satisfaction Problem is employed to assist the decision-making in the scene parsing stage. To facilitate this fulfillment of this task, we designed a hybrid model for graph learning-based SAT solver. Graph matching is employed at the final stage for the scene understanding task. We implemented a hybrid model of GNN and Transformer architecture. Finally, we design the unified hardware acceleration architecture for both dense and sparse data based on the optimizations of algorithms. Our design of the architecture targets the arithmetic operation kernels, such as matrix multiplications, with the help of data transformation and rearrangement. We first transform the inputs and weights with Winograd transform for dense convolution operations, then we feed the transformed data to the matrix multiplication accelerator. While for sparse data, we need to utilize the index to nonzero to fetch data; therefore, the indexation, scattering, and gathering are crucial components, effective implementation will dramatically improve the system's overall performance. To improve the matrix multiplication accelerator's efficiency and reduce the number of heavy arithmetic operations and the number of memory accesses, we also conduct the hardware-based recursive algorithm, i.e., Strassen's algorithm for matrix multiplication.

ISBN: 9798538117543Subjects--Topical Terms:

523869
Computer science.
Subjects--Index Terms:

Artificial intelligence

Adaptive AI Algorithms for Generic Hardware & Unified Hardware Acceleration Architecture.
LDR:03729nmm a2200361 4500 001 2348614
005 20220912135618.5
008 241004s2021 ||||||||||||||||| ||eng d
020 $a 9798538117543
035 $a (MiAaPQ)AAI28646861
035 $a AAI28646861
040 $a MiAaPQ $c MiAaPQ
100 1 $a Shi, Feng. $3 3687979
245 1 0 $a Adaptive AI Algorithms for Generic Hardware & Unified Hardware Acceleration Architecture.
260 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2021
300 $a 199 p.
500 $a Source: Dissertations Abstracts International, Volume: 83-03, Section: B.
500 $a Advisor: Zhu, Song-Chun.
502 $a Thesis (Ph.D.)--University of California, Los Angeles, 2021.
506 $a This item must not be sold to any third party vendors.
520 $a We are now in an era of the Big Bang of artificial intelligence (AI). In this wave of revolution, both industry and academia have cast numerous funds and resources. Machine learning, especially Deep Learning, has been widely deployed to replace the traditional algorithms in many domains, from the euclidean data domain to the non-euclidean domain. As the complexity and scale of the AI algorithms increase, the system host these algorithms requires more computational power and resources than before. Using the design of the modules of the video analytic platform as the use cases, we analyze the workload cost for computational resource and memory allocation during the execution of the system. The video analytic platform is a complex system that comprises various computer vision and decision-making tasks. Every module accomplishing a specific task is a stage in the pipeline of the video analytic platform. With the analyses mentioned above, we synthesize the adaptive AI algorithms from availability and variability perspectives, such as optimization with tensorization or matricization. We conceive the sparse Transformer and segmented linear Transformer as the critical components for the human action recognition task. The Constraint Satisfaction Problem is employed to assist the decision-making in the scene parsing stage. To facilitate this fulfillment of this task, we designed a hybrid model for graph learning-based SAT solver. Graph matching is employed at the final stage for the scene understanding task. We implemented a hybrid model of GNN and Transformer architecture. Finally, we design the unified hardware acceleration architecture for both dense and sparse data based on the optimizations of algorithms. Our design of the architecture targets the arithmetic operation kernels, such as matrix multiplications, with the help of data transformation and rearrangement. We first transform the inputs and weights with Winograd transform for dense convolution operations, then we feed the transformed data to the matrix multiplication accelerator. While for sparse data, we need to utilize the index to nonzero to fetch data; therefore, the indexation, scattering, and gathering are crucial components, effective implementation will dramatically improve the system's overall performance. To improve the matrix multiplication accelerator's efficiency and reduce the number of heavy arithmetic operations and the number of memory accesses, we also conduct the hardware-based recursive algorithm, i.e., Strassen's algorithm for matrix multiplication.
590 $a School code: 0031.
650 4 $a Computer science. $3 523869
650 4 $a Electrical engineering. $3 649834
650 4 $a Datasets. $3 3541416
650 4 $a Fourier transforms. $3 3545926
650 4 $a Experiments. $3 525909
650 4 $a Neural networks. $3 677449
650 4 $a Decomposition. $3 3561186
650 4 $a Breakdowns. $3 3682712
650 4 $a Algorithms. $3 536374
650 4 $a Ablation. $3 3562462
650 4 $a Energy consumption. $3 631630
650 4 $a Artificial intelligence. $3 516317
650 4 $a Computer engineering. $3 621879
653 $a Artificial intelligence
653 $a Computer architecture
653 $a Hardware acceleration
690 $a 0984
690 $a 0544
690 $a 0464
690 $a 0800
710 2 $a University of California, Los Angeles. $b Computer Science 0201. $3 2049859
773 0 $t Dissertations Abstracts International $g 83-03B.
790 $a 0031
791 $a Ph.D.
792 $a 2021
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=28646861