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Fast and Robust Transaction Processi...

Wang, Tianzheng.

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Fast and Robust Transaction Processing on Emerging Hardware.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Fast and Robust Transaction Processing on Emerging Hardware./
作者:	Wang, Tianzheng.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2018,
面頁冊數:	197 p.
附註:	Source: Dissertation Abstracts International, Volume: 79-12(E), Section: B.
Contained By:	Dissertation Abstracts International79-12B(E).
標題:	Computer science. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10684126
ISBN:	9780438189393

Fast and Robust Transaction Processing on Emerging Hardware.
Wang, Tianzheng.

Fast and Robust Transaction Processing on Emerging Hardware. - Ann Arbor : ProQuest Dissertations & Theses, 2018 - 197 p.

Source: Dissertation Abstracts International, Volume: 79-12(E), Section: B.

Thesis (Ph.D.)--University of Toronto (Canada), 2018.

Database engines must adapt to the underlying hardware for high-performance transaction execution. Conventional database engines are built on the storage-centric architecture assuming small DRAM, limited parallelism, and slow network. Emerging hardware, including byte-addressable non-volatile memory (NVRAM), massively parallel processors, and ultra-fast interconnect, has lead to significant changes in the design and implementation of modern database engines. Modern database engines, despite being optimized for multicore hardware, still have unscalable components and unnecessary data redundancy that hinder performance on future servers with large core counts (up to 1000). Database engines should also be robust against various workloads, including traditional short, write-intensive transactions and emerging long, read-mostly, and high-conflict transactions. Existing database engines fail to address these problems, leaving the vast opportunity of accommodating heterogeneous, read-mostly and high-conflict workloads that are enabled by emerging hardware largely unexplored.

ISBN: 9780438189393Subjects--Topical Terms:

523869
Computer science.

Fast and Robust Transaction Processing on Emerging Hardware.
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520 $a Database engines must adapt to the underlying hardware for high-performance transaction execution. Conventional database engines are built on the storage-centric architecture assuming small DRAM, limited parallelism, and slow network. Emerging hardware, including byte-addressable non-volatile memory (NVRAM), massively parallel processors, and ultra-fast interconnect, has lead to significant changes in the design and implementation of modern database engines. Modern database engines, despite being optimized for multicore hardware, still have unscalable components and unnecessary data redundancy that hinder performance on future servers with large core counts (up to 1000). Database engines should also be robust against various workloads, including traditional short, write-intensive transactions and emerging long, read-mostly, and high-conflict transactions. Existing database engines fail to address these problems, leaving the vast opportunity of accommodating heterogeneous, read-mostly and high-conflict workloads that are enabled by emerging hardware largely unexplored.
520 $a These problems must be tackled to make database engines perform fast and robustly on modern high-end and future hardware. In this thesis, we first remove the unscalable logging bottleneck by utilizing NVRAM. NVRAM allows us to revive distributed logging, a once prohibitive but effective solution to centralized logging bottlenecks. Avoiding unscalable logging is crucial in building fast main-memory databases that can potentially scale up to 1000 cores in future servers, but is not enough for handling the inconvenient workloads robustly. We continue on devising concurrency control mechanisms that handle a wide spectrum of workloads robustly. Finally, we demonstrate how high availability solutions can be built to guarantee both data safety and freshness using emerging hardware and by eliminating unnecessary data redundancy through indirection.
520 $a This thesis serves as a toolbox and provides the guidelines for the design and implementation of high-performance and robust database engines and other concurrent systems. The solutions have been evaluated on both mainstream high-end servers and precursors of future hardware that could feature as many as 1000 cores and NVRAM. The techniques are applicable to both modern and future hardware that is yet to come.
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